alexan.staley@LIGO.ORG - posted 19:39, Wednesday 23 April 2014 - last comment - 19:40, Wednesday 23 April 2014(11546)
EY measurements
Today we were able to lock the y arm for a significant period of time. Here are some settings:
PDH REFL Servo Board:
- Input 1 gain: -7dB
- Input 1 pol: pos
- Common comp: ON
- Boost 1: ON
- Boost 2: ON
- Fast gain: 0dB
- Fast pol: pos
- Slow option: EN
- rest: zero/off
I took a few measurements:
- Power at REFL A PD: 6.5mW
- PDH error signal peak to peak: 780mV
- PDH loop suppressed error signal (EY_PDH_NoiseSpecV.txt)
- OLTF: again the UGF was around 3kHz with a phase margin of 68deg (mag --> 125.txt, phase --> 126.txt)
- With ITMX misaligned, I measured the shot noise of REFL A (EY_PDH_ShotNoiseSpecV.txt) -- this noise is partially limited by the SR785 noise; this is not "pure shot noise"
- While blocking the PD, I measured the dark noise of REFL A (EY_PDH_DarkNoiseSpecV.txt) -- this noise is limited by the SR785 noise
Non-image files attached to this report
Comments related to this report
Note: Stefan has since changed the input gain to -13dB and the fast gain to 6dB. The overall UGF and loop shape is the same. See alog 11547