Dave, Cyrus, Jim

An additional ADC card and an 18 bit DAC card was added to the I/O chassis for h1iscex and h1iscey.

At EX:

The 18 bit DAC was added to PCIe slot 11 (bus 2-4), making it the first DAC card on the bus.  The 18 bit adapter card was put into slot 2 of the backplane, while the 16 bit DAC adapter card was moved to slot 6 of the backplane. (The 18 bit DAC needs to be the first DAC card in the chassis, forcing the move of the 16 bit DAC adapter card).  The H1:ISC_DAC0 cable followed the 16 bit DAC adapter to slot 6.

There are now 4 ADC cards installed in the I/O chassis, in PCIe slots 1 (bus 0-1), 2 (bus 1-5), 3 (bus 1-4), and 7 (bus 1-6). An additional ADC adapter card was installed in slot 5 of the backplane, and the PEM AA chassis was connected to this card (it was connected to slot 1).  This caused the ADC card for the PEM model to be moved to the last ADC card.  The H1:ISC_ADC0 and H1:ISC_ADC1 cables were not moved, and the ADC card assignment for the h1iscex model didn't change.

The h1calex model would use ADC card 0 and DAC card 0.

At EY:

ADC cards were installed in slot 4, 5, and 6. These were removed, and ADC cards were installed in PCIe slots 1, 2, 3, and 7 to match EX. An additional ADC adapter card was installed in slot 5 of the backplane.

An 18 bit DAC card was installed in PCIe slot 11 (bus 2-4), while the existing 16 bit DAC remained in PCIe slot 10 (bus 2-5).  The 16 bit DAC adapter card was moved from backplane slot 2 to backplane slot 6, with the H1:ISC_DAC0 cable following the adapter card.  An 18 bit DAC adapter card was installed in backplane slot 2, so the 18 bit DAC card is the first DAC on the PCIe bus, and the 16 bit DAC is the second DAC on the PCIe bus.

The h1caley model would use ADC card 0 and DAC card 0.

For both EX and EY:
backplane assignments:
slot 1 ADC - h1cale(x,y) ADC card 0 
slot 2 DAC - h1cale(x,y) DAC card 0 (18 bit) (share with pem model)
slot 3 ADC - h1isce(x,y) ADC card 1
slot 4 ADC - h1isce(x,y) ADC card 2
slot 5 ADC - h1peme(x,y) ADC card 3
slot 6 DAC - h1isce(x,y) DAC card 0 (16 bit)

An error was made on the installation at EX, so data for the h1pemex and h1iscex models is invalid from 09:35 to 15:40 PDT.  During troubleshooting, a power cycle of the h1iscex I/O chassis caused errors on the h1susex and h1seiex models, requiring a restart of those computers.

The IRIG-B timing drifted on startup of EY, so data for h1pemey, h1iscey, and h1odcy in invalid from 11:15 to 13:42 PDT.