keita.kawabe@LIGO.ORG - posted 18:10, Monday 13 October 2014 - last comment - 07:47, Tuesday 14 October 2014(14431)
IPC errors from h1lsc0 to SUS ETMX and ETMY
H1:FEC-98_IPC_LSC_ETMX_L_SUSETMX_ER
H1:FEC-98_IPC_LSC_ETMY_L_SUSETMY_ER
Seems like these have been non-zero for like forever (why?), but the error counts jumped up on Sep/05/2014 and never came back down.
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The same behavior is seen at LLO. The problem is that the LSC model and/or end-station SUS models are not always getting done soon enough in the real-time cycle to do all the GE FANUC RFM IPC calls. Solutions are 1) Simplify models (fewer filters) to reduce cycle time 2) Reduce the number of GE FANUC RFM IPCs. Rolf and LLO CDS (with help from Gerrit Kuehn at the AEI) have been trying to complete testing on faster hardware to replace the existing LSC0 front-ends. Cycle time does appear to be 30% less, which may be enough. Still need to test in a fully-loaded configuration, and to figure out proper boot method (new hardware needs new network drivers, etc.).
Not sure why reduction of IPC channels would help. There is only one latency critical channel from each iscex and iscey to lsc0, and two from lsc0 to sus/sei in ex and ey, respectively. All others could probably be processed after and then delayed by a full cycle without too much trouble.