Since we've moved forward with the suggested clean up of the TOP stage of a QUAD's cable routing (see T1100327-v3, D080273-v2), this change needed to be accounted for in the test stand's simulink model, given that the order of the analog inputs have changed as a part of the clean up. I've edited, compiled, and installed the simulink model
/opt/rtcds/tst/x1/cds_user_apps/trunk/sus/x1/models/x1susquad.mdl,
to reflect the new input order as defined on D080273-v2:

ADC Channel     Signal
0               M0 F1
1               M0 F2
2               M0 F3
3               M0 SD

4               M0 LF
5               M0 RT
6               R0 LF
7               R0 RT

8               R0 F1
9               R0 F2
10              R0 F3
11              R0 SD