Version 3 (svn tag 97) FPGA code was loaded into all timing comparator/frequency counters. This addresses:
There can still be a problem with crosstalk between channels, especially at frequencies above 200 MHz and signals stronger than 0 dBm. This has only been seen in open channels with no input. Channels with an RF input signal don't seem to suffer from it.
The CER and EX units were swapped with units which had a proper heatsink installed for the 5 V regulator. The following units were modified:
Serial | Location | Heatsink | Code |
---|---|---|---|
S1107952 | CER | installed | 3 |
S1201886 | EX | installed | 3 |
S1201222 | EY | installed | 3 |
S1201227 | shop (MSR) | 3 | |
S1201224 | shop (spare) | 3 |