Reports until 20:55, Friday 23 January 2015
H1 ISC
daniel.sigg@LIGO.ORG - posted 20:55, Friday 23 January 2015 (16244)
Reducing IPC errors

With the addition of the WFS/auto-centering/tidal the CPU cycles in end station isc models have gradually increased to the point where we saw IPC errors in the lsc of ~1000err/sec from ex and ~10000err/sec from ey. The ey problem was compounded by adding the temporary oscillators last Wed. This mainly effects the transmitted red power which is sent to to the corner for locking. We removed the temporary oscillators, the other 2 oscillators we never used, as well as the WFS path to the input PTZs. This reduced the IPC errors as seen by the lsc to 1-2err/sec (both ex and ey). There are still ipc errors from the lsc to the sus (DARM_ERR) around 10err/sec (unchanged).