Reports until 19:37, Monday 23 February 2015
H1 SUS (ISC)
stuart.aston@LIGO.ORG - posted 19:37, Monday 23 February 2015 (16874)
QUAD model changes in preparation of AS WFS damping at M0 (WP#5069)
[Stuart A, Jeff K]

To accommodate QUAD top stage bounce and roll mode damping using AS WFS as sensors (see LHO aLOG entry 16868) it has been necessary to prepare h1sus QUAD models ready for tomorrows planned roll-out. 

All h1sus QUAD models links to the common library (QUAD_MASTER.mdl) were previously broken to provide DARM ERR damping at M0 (see LHO aLOG entry 16655). Therefore, we proceeded to work with the locally modified QUAD models, until such a time that the 'best' damping approach can be incorporated into the common library part for use at both sites.

The following list of changes have been made:
 
(1) ETMs, added RFM receiver for H1:ASC-ETMX_AS_B_RF45_Q_P & H1:ASC-ETMY_AS_B_RF45_Q_P at the top-level (e.g. see h1susetmx_top-level_new.png below).

(2) ITMs, added IPC receiver for H1:ASC-ITM_AS_B_RF45_Q_P.

(3) All QUADs, added input matrix within QUAD/M0/DARM_DAMP block for DARM_ERR + AS_B_RF45 (e.g. see h1susetmx_DARM_DAMP.png below).

(4) All QUADs, routed AS WFS from top-level through to DARM_DAMP and into summation block (e.g. see h1susetmx_M0.png below).

These models were test built which produced the following errors (IPC related):

- H1:ASC-ETMX_AS_A_RF45_Q_P & H1:ASC-ETMX_AS_A_RF45_Q_P
- H1:LSC-ETMX_L_SUSETMX & H1:LSC-ETMY_L_SUSETMY
- H1:LSC-OAF_DARM_ERR

The first is expected due to changes needing to be made to h1asc model. The remaining issues we need to coordinate with Kiwamu who is updating/splitting the h1lsc model.

It is planned to build, install and restart models tomorrow.
Images attached to this report