jeffrey.kissel@LIGO.ORG - posted 08:11, Tuesday 03 March 2015 - last comment - 09:31, Tuesday 03 March 2015(17034)
H1 LSC, OMC, SUS MC2, and CALCS Models Restarted to Updated IMC/CARM Calibration Paths
J. Kissel I'll file an aLOG later about the philosophy of design as I create the MEDM screens and fill out the infrastructure, but for now I'll indicate that I've completed the model / DAQ restarts necessary to install the infrastructure updates to the IMC / CARM calibration paths in the h1lsc, h1omc, h1susmc2, and h1calcs front-end models. A detailed log of what I've done is below. I've restarted the DAQ at ~07:31 UTC. - brought ISC LOCK and IMC LOCK guardians to DOWN - saved SUS MC2 alignment offsets - brought SUS MC2 to safe state - captured and committed safe.snaps for /opt/rtcds/userapps/release/ sus/h1/burtfiles/h1susmc2_safe.snap << -- used SDF system, following instructions in LHO aLOG 16949 lsc/h1/burtfiles/h1lsc_safe.snap << -- used "makeSafeBackup lsc h1lsc" omc/h1/burtfiles/h1omc_safe.snap << -- (as above) cal/h1/burtfiles/h1calcs_safe.snap << -- (as above) - compiled and installed relevant front-end models on h1build make h1lsc; confirmed success; make install-h1lsc; confirmed success; make h1omc; confirmed success; make install-h1omc; confirmed success; make h1susmc2; confirmed success; make install-h1susmc2; confirmed success; make h1calcs; confirmed sussess; make install-h1calcs; confimed success; - h1lsc has an IPC error before getting started, but cleared and stayed clear after diag reset (no other models had IPC errors reported) - brought HAM3 SEI to OFFLINE (with a spurious GS13 watchdog trip along the way) - restarted relevant front-end code on h1lsc0 -- cdsCode; starth1lsc This lit up the CDS overview with IPC errors as expected, on h1omc, oaf, lscaux, asc, ascimc, and the globally controlled sus (the MCs 1-3, PRs M&2, SRs M&2, BS, OMs, RMs, and TMs). Decided to complete model restarts before clearing errors. on h1omc -- starth1omc on h1calcs -- starth1calcs released the model still needs new IPC senders from MC2 before its IPC errors go away on h1sush34 -- starth1susmc2 on h1oaf0 -- starth1calcs - Hand-cleared all IPC error messages with a diag reset on all affected model's GDS_TP screens; confirmed no lingering errors were present. - cleared SUS MC2 and ISI HAM3 watchdogs from SUS model restart - brought HAM3 SEI up to ISOLATED (accompanied by another spurious GS13 watchdog trip) - brought SUS MC2 to ALIGNED - brought IMC_LOCK guardian back to LOCKED, confirmed successful relock of IMC, appearance of light on AS port in the same camera position it was when I got started - shutdown DAQ / FB / h1dc0 at 07:31 UTC to clear remaining DAQ errors; confirmed the only remaining error is from h1oaf model, who is now missing some CARM / IMC senders - committed all model changes to the userapps repo, ${userapps}/lsc/h1/models$ Sending h1lsc.mdl ${userapps}/omc/h1/models$ Sending h1omc.mdl ${userapps}/sus/h1/models$ Sending h1susmc2.mdl ${userapps}/cal/common/models$ Sending CAL_CS_MASTER.mdl ${userapps}/cal/h1/models$ Sending h1calcs.mdl Committed revision 9944. DONE!
J. Kissel, K. Izumi What have I changed in the models? LSC Model, lsc/h1/models/h1lsc.mdl (and omc/common/models/lscimc.mdl) -- Inside the IMC (library) block, - removed obsolete GUARD block (which removes many, now unused EPICs channels from the lsc model) - removed obsolete FRINGE block (originally thought to be used to count the number of fringes passed in a given computation cycle, never used in practice) - removed redundant shipping of IMC L control signal from surrounding the IMC-MCL path, which now needs only be picked off of MC2 - removed now unnecessary flags between IMC-L / IMC-TRANS and IMC-MCL paths - installed new spigot for shipping IMC common mode board's error signal (which starts as the "IMC-I") to CAL-CS front end model -- Top-level - removed all instances of IMC L control signal IPCs to cal CS model - installed new IPC for IMC common mode board's error signal, called H1:LSC-CAL_IMC_ERR - renamed IPC for digitized fast control signal (typically called some form of IMC-F) to H1:LSC-CAL_IMC_F_CTRL OMC Model, omc/h1/models/h1omc.mdl (and omc/common/models/omclsc.mdl) -- Inside the LSC (library) block, - removed all spigots for CARM ERR and CARM CTRL signals surrounding the CARM bank (in the OMC model, this is really only meant for the eventual, if necessary small corrections for CARM send to the ETMs, they'll now again, be gathered elsewhere to simplify the calibration scheme) -- Top-level - installed new IPC sender for the IFO / REFL9 common mode board's error signal, called H1:OMC-CAL_CARM_ERR - removed all former CARM ERR and CARM CTRL IPC senders SUS MC2 model, sus/h1/models/h1susmc2.mdl -- Top-level - installed 3 new IPC senders for the "CTRL" output of the LOCK filters for each stage, to be fed to the CAL-CS model, called H1:SUS-MC2_M1_LOCK_L_CTRL, H1:SUS-MC2_M2_LOCK_L_CTRL, and H1:SUS-MC2_M3_LOCK_L_CTRL. CAL-CS model, cal/h1/models/h1calcs.mdl (and cal/common/models/CAL_CS_MASTER.mdl) -- Top-level - removed all former IPC recievers of various versions / pick-offs of the IMC control signals - installed all new IPC receivers mentioned above, Error Signals: H1:LSC-CAL_IMC_ERR from h1lsc.mdl error signal for IMC when CARM is not locked Digitized IMC Common Mode Board signal (digitized after the sum of the two input signals) H1:OMC-CAL_CARM_ERR from h1omc.mdl error signal for CARM when CARM is locked Digitized IFO / REFL9 Common Mode Board signal (digitized after the sum of the two input signals) Control Signals H1:LSC-CAL_IMC_F_CTRL from h1lsc.mdl "fast" control signal for IMC going to PSL Digitized IMC Common Mode Board signal that goes to PSL AOM, after all analog filtering on CM board H1:SUS-MC2_M1_LOCK_L_CTRL from h1susmc2.mdl "slow", hierarchical control signal for M1 stage of MC2 H1:SUS-MC2_M2_LOCK_L_CTRL from h1susmc2.mdl "slow", hierarchical control signal for M2 stage of MC2 H1:SUS-MC2_M3_LOCK_L_CTRL from h1susmc2.mdl "slow", hierarchical control signal for M3 stage of MC2 - reconnected all of the IPCs to the newly reshuffled inputs to the CS block -- Inside the CS (library) block - Pulled out the CTRL signal calculation for the IMC since the sum of the FAST / F and SLOW / L is needed for both the IMC and CARM calibration signals, depending on the configuration of the IFO. Put it in a new block called SUM_IMC_CTRL - Pushed the output of SUM_IMC_CTRL to the now single CTRL inputs of SUM_IMC and SUM_CARM, where they're added to the respective IMC and CARM error signals. - Created new channels intended to be the "final answer," (though they're not yet stored in the frames, sothey don't yet have the "_DQ" extension) H1:CAL-CS_IMC_DELTAF (_DQ) --- open loop frequency noise for the IMC when CARM is not controlled H1:CAL-CS_IMC_CTRL (_DQ) --- total frequency control signal sent to the IMC and PSL either when the error signal is either IMC or CARM H1:CAL-CS_IMC_DELTAF (_DQ) --- open loop frequency noise for CARM when CARM is controlled