at 8:25 in an attempt to continue the locking sequence that had gotten "stuck" at engatge "ENGAGE_ASC". I selected "DC_READOUT_TRANSITION" to try and get it moving again. THis tripped the SUS RMS watchdogs on the ETMs. I was able to reset ETMY remotely but ETMX seems to need a PUM coil driver power cycle.
Filiberto power cycled ETMX PUM (and UIM accidentaly) and this cleared the UL RMS trip.
We should really just rip out these PUM driver RMS watchdogs, they're serving no protective purpose anymore -- unless there's something I don't know. It would be great if DetChar took a look at the many PUM driver watchdog trips that have happened over the past few weeks (using ${IFO}:SUS-${OPTIC}_BIO_L2_MON as the readback, an EPICs channel, so it should exist in the frames), and find out when the current goes over using the RMS current monitor, ${IFO}:SUS-${OPTIC}_L2_RMSIMON_UL_MON (and EPICs channel, so it should exist in the frames), and see if that corresponds to some actually dangerous level of current to the internal circuitry. If not, we rip this pesky thing out. Recall you can find all the information you could need in page 3 of the QUAD controls design description: T1100378. The only trickery that is poorly documented is that the binary input readback, ${IFO}:SUS-${OPTIC}_BIO_L2_MON, actually contains many status bits. Whether the UL, LL, UR, LR RMS current watchdogs are tripped are readback bits 2.^[1 5 9 13], which means you need to mask the bit word with the numbers 2, 32, 512, and 8192 to obtain the right information. The best "source" for this information is the QUAD's MEDM screen overview which has these masks, in concert with the first page of PUM driver's schematic, D070483.