Koji, Sheila
Koji and I searched around for the source of the periodic (every 4 second) glitch in DARM control when locked on ALS figure attached to 17684. The problem seems to be the DIFF PLL board, we were able to see the glitches in the PLL control signal when it was locked to a marconi instead of the DIFF beatnote. We locked the DIFF beatnote using the COMM PLL board, saw no glitches, and also swapped the ADC cables to make sure the DIFF ADC channels were fine. I don't know where the spare is, so we are elaving the chassis in the rack for now, but the board needs to be swapped before we can get back to locking the full IFO reliably.
Just too be clear, it seems likely these are a different class of glitches from those described in 17576 and linked alogs
We made some additional tests this morning but couldn't see anything obviously wrong. There is a fair amount of RF interference between the 3 VCOs which depending on the exact frequencies looks bad.
Some additional observations:
Eventually we figured out that with DIFF and COMM unlocked, these 4-second glitches were showing up in the Y end green control signal, and not in X.
So we drove down to EY and found that the EY ESD driver was tripped. We could hear that it was trying to reset itself every 4 seconds or so. Untripping the driver made the glitches go away.
It is unclear whether this was actually kicking the test mass, or coupling into the green readout some other way.