Reports until 15:02, Wednesday 20 May 2015
H1 CDS
david.barker@LIGO.ORG - posted 15:02, Wednesday 20 May 2015 (18532)
h1iscex restarted after ADC timing error

At roughly 10:40 PDT h1iscex stopped running its models with an ADC timout. Rick and the PCAL team were in the VEA at the time, but we could not link any activity with a potential glitch of the IO Chassis. I restarted the system using a full power cycle of both CPU and IO Chassis. We burt restored h1calex from earlier this morning.