J. Kissel, D. Barker, J. Batch, R. McCarthy, R. Abbott

First: Thanks to all that aLOGged / documented what we had installed / debugged for the new low-noise ESD driver in my absence, (i.e. LHO aLOGs 18559, 18592, 18568). Apologies for not having time for the true systems level check-out and not committing my work!

Second: The messages -- 
(a) The new BIO control and monitoring for the low-voltage ESD driver at H1SUSETMY is now independent of the H1SUSTMSY's BIO. To do so, we had to move the Binary Input and Output cables two ports "up" from channels 16-23 & 24-31 (as originally designed in D1400177-v4) to channels 32-39 & 40-47, and change the front-end code mapping in the h1susetmy.mdl model accordingly.
(b) I've fixed the bug which mapped the IPC error rate signal for the Tidal Correction into the main "library" block. It's now feeding the actual signal to the main library block as one might expect.

Details
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I've installed new infrastructure to support the BIO monitoring and control of switches inside the new low-noise ESD driver. Mostly* following the drawing shown in D1400177-v4, the driver has five groups of functions that are controlled and monitored: (follow along with the block diagram D1400301)
(1) HI VOLT DISCONNECT: there are four (one for each ESD quadrant) independently switchable relays on the input (marked as S1, S2, S3, and S4) that either engage the High Voltage ESD driver, or ground that connection and only use the Low Voltage Driver
(2) Low-pass filter switching (STATE REQUEST on the BIO MEDM screen): again four (on for each ESD quadrant) independently switchable relays to engage a z:p:k = [ 50,50 : 2.2,2.2 : 1 ] low pass filter (for more accurate description of poles and zeros, see the now-measured transfer function LHO aLOG 18579). 
     State 1 : Low Pass OFF
     State 2 : Low Pass ON
     [Bonus states, as with any coil driver: State 0: ISC control (currently terminated); State -1 or -2: same as above but use has control over digital compensation filters]
(3) HI/LO VOLTAGE: four, independently switchable relays  toward the output of the driver that select using the output of the High Voltage driver or bypassing it entirely (if the HI VOLT DISCONNECT is switched to DISCONNECTED). 
(4) RIGHT / LEFT PI SWITCH: For the not-yet commissioned parametric instability path (whose control signal will eventually come from an independent front-end model running at 64 [kHz]) one can independently chose whether to drive the upper or lower quadrant of the LEFT and RIGHT sides.
(5) HV ESD DRIVER TRIP RESET: This functionality should match the functionality of the red button on the front of the High Voltage driver -- when the driver trips, this is its momentary RESET button.

All of these switches are controlled via Binary I/O in the h1susetmy. They're packed up into a 16-bit word that gets fed to the binary IO card (see the generation of this word in 
2015-05-26_H1SUSETMY_BIO_L3.png). Note that for the low-pass filter switching (STATE REQUEST on the BIO MEDM screen) I've created a new sub-function to
/opt/rtcds/userapps/release/sus/common/src/CD_STATE_MACHINE.c
which is basically identical to the TOP driver's function, but without a test-coil enable, because it's a similar two-state machine (a state machine diagram will be added to T1100507 in the fullness of time).

Problem (a) was a result of piping this 16-bit control word into the "upper" half (bits 16-31) of the "lower" 32 bits (bits 0-31) of the 2nd (Card "1") of the h1susey 64-bit binary I/O cards, which is what the TMSY was already using to control its TOP mass coil driver switching (who was using the "lower" half, bits 0-15 of that same "lower" 32 bits of the 2nd card). Recall that the RCG must artificially split the 64-bits into two 32-bit words (the "lower" (0-31) and "upper" 32 (32-63), referred to as L32 and H32, respectively). However, it turns out that two front-end models cannot share one of these upper or lower halves, even though in analog land one might suspect that one might even be able to break the card up into even 8-bit word chunks. Thankfully the BI and BO chassis have virtually all of their spigots free, so we just shifted the cables "up" so that they came in on the "upper," H32 "card" and modified the front-end code accordingly to match (see 
2015-05-26_H1SUSETMY_SimulinkModel.png, and please forgive the mislabeled BIO ENCODE spigot that says it's still outputing the "L32" bits. This is an inconsequential remnant of the bug fix that I only noticed while writing this log, and I don't want to 4-R the front-end code just for a label fix.)

Problem (b) was just a byproduct of my haste in getting these front-end changes done. While cleaning up the top level of the model, I just misconnected the new FLAG / TAG for the tidal servo signal to the IPC error rate. Sorry about that.

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The following has been committed to the userapps repo (recall the top level, main control system part of model is *already* unhooked from the library because of how tidal corrections have been implemented):
/opt/rtcds/userapps/release/sus/h1/models/h1susetmy.mdl  SORRY FOR NOT DOING THIS EARLIER!!
/opt/rtcds/userapps/release/sus/common/src/CD_STATE_MACHINE.c 

The following has be consciously NOT committed to the repo (because it will conflict with changes already made to support ECR E1500228):
/opt/rtcds/userapps/release/sus/common/medm/quad
SUS_CUST_QUAD_OVERVIEW.adl
SUS_CUST_QUAD_BIO.adl