J. Kissel, D. Barker,

Receiveing word from DetChar on yesterday's run meeting call that they're seeing major carry transition glitches in the IMC, Dave and I have restarted the h1iopsush34 front end model on the h1sush34 front-end, which runs a calibration routine on the 18-bit DACs in the corresponding I/O chassis. The reboot is now complete, and the IMC is up and running. We've confirmed that all DAC cards had a successful auto-calkbiration.


controls@h1sush34 ~ 0$ uptime
 11:52:19 up 13 days, 33 min,  0 users,  load average: 0.01, 0.02, 0.00
controls@h1sush34 ~ 0$ dmesg | grep AUTOCAL
# After the I/O chassis Power Supply, Timing Slave Firmware, and 18 bit DAC card upgrades had finished on May 21 2015:
[   49.512048] h1iopsush34: DAC AUTOCAL SUCCESS in 5341 milliseconds 
[   54.875289] h1iopsush34: DAC AUTOCAL SUCCESS in 5344 milliseconds 
[   60.668130] h1iopsush34: DAC AUTOCAL SUCCESS in 5345 milliseconds 
[   66.030689] h1iopsush34: DAC AUTOCAL SUCCESS in 5341 milliseconds 
[   71.823494] h1iopsush34: DAC AUTOCAL SUCCESS in 5344 milliseconds 
[   77.186841] h1iopsush34: DAC AUTOCAL SUCCESS in 5345 milliseconds 
# This restart:
[1121136.381304] h1iopsush34: DAC AUTOCAL SUCCESS in 5345 milliseconds 
[1121141.741653] h1iopsush34: DAC AUTOCAL SUCCESS in 5344 milliseconds 
[1121147.529535] h1iopsush34: DAC AUTOCAL SUCCESS in 5344 milliseconds 
[1121152.889081] h1iopsush34: DAC AUTOCAL SUCCESS in 5340 milliseconds 
[1121158.677788] h1iopsush34: DAC AUTOCAL SUCCESS in 5345 milliseconds 
[1121164.037291] h1iopsush34: DAC AUTOCAL SUCCESS in 5340 milliseconds


@ DetChar -- we are VERY interested to track how we these DAC calibrations behave over time, to find out how often we need to do these auto cal routines. Please make sure to look for glitches *every day* during ER7, and report back to us
- Did *this* autocal fix the problem you've seen that made you request it?
- If you still see the problem, did the autocal at least *reduce* the glitches?
- How quickly, if at all, do glitches come back? (a plot of glitch amplitude vs time over ER7)
- You'd mentioned you can't see it in DARM -- confirm that this is true for the entire run
- Because we've have so many of these DAC cards fail during the May 21 upgrade, we were forced to *not* upgrade the cards in the h1sush56 I/O chassis. This means that H1SUSSRM, H1SUSSR3 and H1SUSOMC *have not* had their DAC cards upgraded. Can you tell a difference? 
- I would expect H1SUSSRM and H1SUSSR3 to have great influence on DARM, given the know SRCL to DARM coupling. Is there evidence of this?
- We send control ASC control to both SR2 and SRM, and LSC control to SRM. SR2 has new 18 bit DACs and SRM does not. If you can see glitching in SRCL -- can you tell if it's more SRM / SR3 than SR2? 

Thanks ahead of time!