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Reports until 13:52, Tuesday 30 June 2015
H1 CAL
jeffrey.kissel@LIGO.ORG - posted 13:52, Tuesday 30 June 2015 - last comment - 14:01, Tuesday 30 June 2015(19386)
Actuation Path Front-end Time Delay Increased (back) to 4 Clock Cycles
J. Kissel, K. Izumi, J. Betzwieser

Prior to ER7, Kiwamu and I had convinced ourselves that the delay installed in the front-end (i.e. what produces DELTAL_EXTERNAL) on the actuation path should be the difference in the known time delays on the actuation and sensing paths (see LHO aLOG 17951), and therefore entered in "1.0" to the number of clock cycles the actuation path should be delayed.

Since then, Joe reminded us that what should be installed is the sum of the known delay. See pg 11 of G1500750 for clear pictorial explanation. This sum is closest to 4.0 clock cycles.

I have now updated H1:CAL-CS_DARM_CTRL_DELAY_CYCLES (the EPICs record that dictates how much the actuation path should be delayed) to be 4.0 clock cycles, and accepted the new value in the SDF system.

NOTE Because this front-end actuation delay has been moved upstream of the application of the actuation function calibration (see LHO aLOG 19382), only DELTAL_EXTERNAL receives this delay now. In other words, DELTAL_CTRL, and DELTAL_RESIDUAL must be delayed / advanced appropriately if you want the right answer. The intent is that GDS calibration pipeline will add the appropriate, as-precise-as-we-know-it, delays to each path (apply the other super-16[kHz]-Nyquist-frequency poles/zeros), and add them together to form the more accurate GDS-CALIB_STRAIN.
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jeffrey.kissel@LIGO.ORG - 14:01, Tuesday 30 June 2015 (19387)
Note, I say "back" to 4 clock cycles, because we had 4.0 clock cycles installed prior to May 12 -- see LHO aLOG 18393, which cites that we got the number originally from copying the LLO front-end calibration setup (i.e. the number Joe and Den had already correctly calculated / installed as 4.0, LLO aLOG 16421) -- Kiwamu and I just hadn't grokked why it was 4.0 until a month or two later. Hooray for science!
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