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Reports until 19:48, Friday 14 August 2015
H1 CAL (CAL, ISC)
jeffrey.kissel@LIGO.ORG - posted 19:48, Friday 14 August 2015 - last comment - 16:20, Sunday 16 August 2015(20542)
ALS DIFF VCO / PLL Open Loop Gain Modeled to better than 1% and 1 [deg]
J. Kissel, J. Driggers, C. Cahillane, K. Izumi

I've taken the data that we took last Sunday of the ALS DIFF PLL Open Loop Gain TF and Boosts (from LHO aLOG 20363), built a model of the loop. Given the precision of the measurement, I can make a model the reporoduces the boost filters and the PLL OLGTF to within 1% and 1 [deg]. The most important outcome of this is the ability to characterize the frequency dependence of the low-pass filter just before the VCO. The nominally z:p = 40:1.6 VCO Filter is actually a z:p = 1.05:40 Hz filter. This means that, in using the ALS DILL PLL CTRL signal, prior estimates of overall actuation strength of the QUADs (i.e. LHO aLOH 18711) was over estimated by (1.6-1.05)/1.6 = 34%. This potentially explains some of the discrepancy we saw when comparing the three methos, PCAL, Free Swinging Michelson, and ALS DIFF VCO in LHO aLOG 18767.

Of course, as you know, we plan remeasure all methods and make the comparison again.

Details:
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Here're the final answer numbers of the model:
                                                   Traditionally Quoted "Nominal" Values            This Model's Fit Values
Phase Frequency Discriminator (PFD)                        z:p = (none):(0Hz)                   z:p = (none):(0Hz, 450kHz)
Voltage Contolled Oscillator (VCO)                         z:p = 40Hz:1.6Hz                     z:p = 40Hz:1.05Hz
Phase Locking Loop (PLL) Control Common Gain               26 [dB]                                                     25.5 [dB]
Phase Locking Loop (PLL) Control Boost Filter 1            z:p:k = 20kHz:2kHz:0dB               z:p:k = 1.9kHz:1.89kHz:0dB
Phase Locking Loop (PLL) Control Boost Filter 2            z:p:k = 2kHz:40Hz:0dB                z:p:k = 1.95kHz:38.55Hz:-0.2dB

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Attached are figures demonstrating the progression and precision of the model.
pg1 : The final answer, showing the model of the ALS DIFF PLL Open Loop Gain TF from 0.1 Hz to 1e6 Hz.
pg2 : PLL Control Boost Filter 1; a comparison between measurement, model with fit parameters, and nominal parameters
pg3 : PLL Control Boost Filter 2; a comparison between measurement, model with fit parameters, and nominal parameters
pg4 : PLL OLGTF, with out the boosts engaged
pg5 : PLL OLGTF, with boosts engaged
pg6 : A comparison between fit residuals and nominal residuals with measurement.
pg7 : A confirmation that the closed loop gain, G / 1+G, of the ALS DIFF PLL is indeed 1.0 to better than 0.1% out to 1 kHz.

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Perhaps it is of interest for the scrutinous to focus on pg 6, where I compare the residuals, and it'll illustrate my motivations for the fit paramaters, and my quoting that we trust their values to such high precision.
Question 1: Why d'you think the magnitude uncertainty is less that 1%, when clearly the boost OLG measurement residual falls by 15% with frequency below 1 kHz, and the unboosted measurement residual falls by 10% with frequency below 100 Hz?
     Recall that at these frequencies, below 1 kHz and 100 Hz for the boosted and unboosted measurements, respectively there is a rediculous amount of loop suppression. As such, given that the phase residual holds up well to fitted poles, and has little affect on the magnitude residual, I suspect that the measurement magnitude drops with frequency as the suppression increases due to very-small, non-linear, in-loop voltage affects.

Question 2: Why do you think there's an 450 kHz pole in the PFD when you've only measured up to 100 kHz?
     I played around with the very-high-frequency response for a while. Of course, a pole is the only high-frequency tool one has to affect the magnitude residual, and 450 kHz was a good balance between the fitted time delay, and the frequency of the pole. Both the 800 [ns] and 450 kHz pole are "plausible." Inside the PFD, there is a fast chip, that the data sheet claims is good up to 100 kHz, but that doesn't mean much, because you don't know what rolloff filter was chosen. 800 [ns] would correspond to a few hundred meters of cable length difference, so it's not that. But if I see a consistent ~230 [ns] delay in the indepednent measurements of the boost filters, it's not crazy to think that the whole phase-locking-loop accrues 800 [ns].

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The analysis script that built this model is commited to the CAL SVN here:
/ligo/svncommon/CalSVN/aligocalibration/trunk/Runs/PreER8/H1/Scripts/ALSDIFF/ALSDIFFModel_PreER8.m
and the plots live here:
/ligo/svncommon/CalSVN/aligocalibration/trunk/Runs/PreER8/H1/Results/ALSDIFF/2015-08-09_H1ALSDIFF_PLL*.pdf
Non-image files attached to this report
Comments related to this report
jeffrey.kissel@LIGO.ORG - 16:20, Sunday 16 August 2015 (20570)
Sheesh -- you'd figure I'd get the most important sentence in the aLOG right.

Of course, I mean to say:
The nominally z:p = 40:1.6 VCO Filter is actually a z:p = 40:1.05 Hz filter.
The pole is at 1.05 Hz.

Thanks for the catch, Matt.

Further, in the table, I make another typo:
                                                   Traditionally Quoted "Nominal" Values            This Model's Fit Values
Phase Frequency Discriminator (PFD)                        z:p = (none):(0Hz)                   z:p = (none):(0Hz, 450kHz)
Voltage Contolled Oscillator (VCO)                         z:p = 40Hz:1.6Hz                     z:p = 40Hz:1.05Hz
Phase Locking Loop (PLL) Control Common Gain               26 [dB]                                                     25.5 [dB]
Phase Locking Loop (PLL) Control Boost Filter 1            z:p:k = 20kHz:2kHz:0dB               z:p:k = 19kHz:1.89kHz:0dB
Phase Locking Loop (PLL) Control Boost Filter 2            z:p:k = 2kHz:40Hz:0dB                z:p:k = 1.95kHz:38.55Hz:-0.2dB


Thanks for that catch, Bram.

This is what I get for writing such an entry at 8p on a Friday, and then immediately leaving for an off-the-grid public outreach event for the weekend!

Are we any where closer to being able to edit aLOGs past 24 hours?
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