Displaying report 1-1 of 1.
Reports until 11:49, Tuesday 25 August 2015
H1 ISC
keita.kawabe@LIGO.ORG - posted 11:49, Tuesday 25 August 2015 (20864)
LSC and ASC science frame channels update

WP5452: New LSC and ASC models were made and built yesterday, and were installed today. ASC update also include one bug fix for ASC ODC (change one data type from cdsepicsout to cdsepicslong).

As for LSC, as per E1500343, 45MHz AM monitor channels was added to the science frame at 16kHz.

As for ASC, as per E1500348, input side of ASC feedback filters were added to ASC at 256Hz, and as per E1500349, ALS-C_TRX_A_LF_OUT_DQ and ALS-C_TRY_A_LF_OUT_DQ (both 2k) were removed.

After the installation, in chans/daq directory, LSC and ASC science frame channels were checked.

$ grep -B 1 "^acquire=3" H1LSC.ini|grep DQ

[H1:IMC-F_OUT_DQ]
[H1:IMC-I_OUT_DQ]
[H1:IMC-L_OUT_DQ]
[H1:IMC-REFL_DC_OUT_DQ]
[H1:IMC-TRANS_OUT_DQ]
[H1:LSC-ASAIR_B_RF90_I_ERR_DQ]
[H1:LSC-MCL_IN1_DQ]
[H1:LSC-MCL_OUT_DQ]
[H1:LSC-MICH_IN1_DQ]
[H1:LSC-MICH_OUT_DQ]
[H1:LSC-MOD_RF45_AM_AC_OUT_DQ]
[H1:LSC-ODC_CHANNEL_OUT_DQ]
[H1:LSC-POPAIR_B_RF18_I_ERR_DQ]
[H1:LSC-POPAIR_B_RF90_I_ERR_DQ]
[H1:LSC-POP_A_LF_OUT_DQ]
[H1:LSC-POP_A_RF45_I_ERR_DQ]
[H1:LSC-POP_A_RF45_Q_ERR_DQ]
[H1:LSC-POP_A_RF9_I_ERR_DQ]
[H1:LSC-POP_A_RF9_Q_ERR_DQ]
[H1:LSC-PRCL_IN1_DQ]
[H1:LSC-PRCL_OUT_DQ]
[H1:LSC-REFL_A_LF_OUT_DQ]
[H1:LSC-REFL_A_RF45_I_ERR_DQ]
[H1:LSC-REFL_A_RF45_Q_ERR_DQ]
[H1:LSC-REFL_A_RF9_I_ERR_DQ]
[H1:LSC-REFL_A_RF9_Q_ERR_DQ]
[H1:LSC-REFL_SERVO_ERR_OUT_DQ]
[H1:LSC-REFL_SERVO_SLOW_OUT_DQ]
[H1:LSC-SRCL_IN1_DQ]
[H1:LSC-SRCL_OUT_DQ]

 

$ grep -B 1 "^acquire=3" H1ASC.ini|grep DQ

[H1:ASC-AS_A_DC_PIT_OUT_DQ]
[H1:ASC-AS_A_DC_SUM_OUT_DQ]
[H1:ASC-AS_A_DC_YAW_OUT_DQ]
[H1:ASC-AS_A_RF36_I_PIT_OUT_DQ]
[H1:ASC-AS_A_RF36_I_YAW_OUT_DQ]
[H1:ASC-AS_A_RF36_Q_PIT_OUT_DQ]
[H1:ASC-AS_A_RF36_Q_YAW_OUT_DQ]
[H1:ASC-AS_A_RF45_I_PIT_OUT_DQ]
[H1:ASC-AS_A_RF45_I_YAW_OUT_DQ]
[H1:ASC-AS_A_RF45_Q_PIT_OUT_DQ]
[H1:ASC-AS_A_RF45_Q_YAW_OUT_DQ]
[H1:ASC-AS_B_DC_PIT_OUT_DQ]
[H1:ASC-AS_B_DC_SUM_OUT_DQ]
[H1:ASC-AS_B_DC_YAW_OUT_DQ]
[H1:ASC-AS_B_RF36_I_PIT_OUT_DQ]
[H1:ASC-AS_B_RF36_I_YAW_OUT_DQ]
[H1:ASC-AS_B_RF36_Q_PIT_OUT_DQ]
[H1:ASC-AS_B_RF36_Q_YAW_OUT_DQ]
[H1:ASC-AS_B_RF45_I_PIT_OUT_DQ]
[H1:ASC-AS_B_RF45_I_YAW_OUT_DQ]
[H1:ASC-AS_B_RF45_Q_PIT_OUT_DQ]
[H1:ASC-AS_B_RF45_Q_YAW_OUT_DQ]
[H1:ASC-AS_C_PIT_OUT_DQ]
[H1:ASC-AS_C_SUM_OUT_DQ]
[H1:ASC-AS_C_YAW_OUT_DQ]
[H1:ASC-CHARD_P_IN1_DQ]
[H1:ASC-CHARD_P_OUT_DQ]
[H1:ASC-CHARD_Y_IN1_DQ]
[H1:ASC-CHARD_Y_OUT_DQ]
[H1:ASC-CSOFT_P_IN1_DQ]
[H1:ASC-CSOFT_P_OUT_DQ]
[H1:ASC-CSOFT_Y_IN1_DQ]
[H1:ASC-CSOFT_Y_OUT_DQ]
[H1:ASC-DC1_P_IN1_DQ]
[H1:ASC-DC1_P_OUT_DQ]
[H1:ASC-DC1_Y_IN1_DQ]
[H1:ASC-DC1_Y_OUT_DQ]
[H1:ASC-DC2_P_IN1_DQ]
[H1:ASC-DC2_P_OUT_DQ]
[H1:ASC-DC2_Y_IN1_DQ]
[H1:ASC-DC2_Y_OUT_DQ]
[H1:ASC-DC3_P_IN1_DQ]
[H1:ASC-DC3_P_OUT_DQ]
[H1:ASC-DC3_Y_IN1_DQ]
[H1:ASC-DC3_Y_OUT_DQ]
[H1:ASC-DC4_P_IN1_DQ]
[H1:ASC-DC4_P_OUT_DQ]
[H1:ASC-DC4_Y_IN1_DQ]
[H1:ASC-DC4_Y_OUT_DQ]
[H1:ASC-DC5_P_IN1_DQ]
[H1:ASC-DC5_P_OUT_DQ]
[H1:ASC-DC5_Y_IN1_DQ]
[H1:ASC-DC5_Y_OUT_DQ]
[H1:ASC-DHARD_P_IN1_DQ]
[H1:ASC-DHARD_P_OUT_DQ]
[H1:ASC-DHARD_Y_IN1_DQ]
[H1:ASC-DHARD_Y_OUT_DQ]
[H1:ASC-DSOFT_P_IN1_DQ]
[H1:ASC-DSOFT_P_OUT_DQ]
[H1:ASC-DSOFT_Y_IN1_DQ]
[H1:ASC-DSOFT_Y_OUT_DQ]
[H1:ASC-INP1_P_IN1_DQ]
[H1:ASC-INP1_P_OUT_DQ]
[H1:ASC-INP1_Y_IN1_DQ]
[H1:ASC-INP1_Y_OUT_DQ]
[H1:ASC-INP2_P_IN1_DQ]
[H1:ASC-INP2_P_OUT_DQ]
[H1:ASC-INP2_Y_IN1_DQ]
[H1:ASC-INP2_Y_OUT_DQ]
[H1:ASC-MICH_P_IN1_DQ]
[H1:ASC-MICH_P_OUT_DQ]
[H1:ASC-MICH_Y_IN1_DQ]
[H1:ASC-MICH_Y_OUT_DQ]
[H1:ASC-ODC_CHANNEL_OUT_DQ]
[H1:ASC-OMC_A_PIT_OUT_DQ]
[H1:ASC-OMC_A_SUM_OUT_DQ]
[H1:ASC-OMC_A_YAW_OUT_DQ]
[H1:ASC-OMC_B_PIT_OUT_DQ]
[H1:ASC-OMC_B_SUM_OUT_DQ]
[H1:ASC-OMC_B_YAW_OUT_DQ]
[H1:ASC-POP_A_PIT_OUT_DQ]
[H1:ASC-POP_A_SUM_OUT_DQ]
[H1:ASC-POP_A_YAW_OUT_DQ]
[H1:ASC-POP_B_PIT_OUT_DQ]
[H1:ASC-POP_B_SUM_OUT_DQ]
[H1:ASC-POP_B_YAW_OUT_DQ]
[H1:ASC-POP_X_RF_I_PIT_OUT_DQ]
[H1:ASC-POP_X_RF_I_YAW_OUT_DQ]
[H1:ASC-POP_X_RF_Q_PIT_OUT_DQ]
[H1:ASC-POP_X_RF_Q_YAW_OUT_DQ]
[H1:ASC-PRC1_P_IN1_DQ]
[H1:ASC-PRC1_P_OUT_DQ]
[H1:ASC-PRC1_Y_IN1_DQ]
[H1:ASC-PRC1_Y_OUT_DQ]
[H1:ASC-PRC2_P_IN1_DQ]
[H1:ASC-PRC2_P_OUT_DQ]
[H1:ASC-PRC2_Y_IN1_DQ]
[H1:ASC-PRC2_Y_OUT_DQ]
[H1:ASC-REFL_A_DC_PIT_OUT_DQ]
[H1:ASC-REFL_A_DC_SUM_OUT_DQ]
[H1:ASC-REFL_A_DC_YAW_OUT_DQ]
[H1:ASC-REFL_A_RF45_I_PIT_OUT_DQ]
[H1:ASC-REFL_A_RF45_I_YAW_OUT_DQ]
[H1:ASC-REFL_A_RF45_Q_PIT_OUT_DQ]
[H1:ASC-REFL_A_RF45_Q_YAW_OUT_DQ]
[H1:ASC-REFL_A_RF9_I_PIT_OUT_DQ]
[H1:ASC-REFL_A_RF9_I_YAW_OUT_DQ]
[H1:ASC-REFL_A_RF9_Q_PIT_OUT_DQ]
[H1:ASC-REFL_A_RF9_Q_YAW_OUT_DQ]
[H1:ASC-REFL_B_DC_PIT_OUT_DQ]
[H1:ASC-REFL_B_DC_SUM_OUT_DQ]
[H1:ASC-REFL_B_DC_YAW_OUT_DQ]
[H1:ASC-REFL_B_RF45_I_PIT_OUT_DQ]
[H1:ASC-REFL_B_RF45_I_YAW_OUT_DQ]
[H1:ASC-REFL_B_RF45_Q_PIT_OUT_DQ]
[H1:ASC-REFL_B_RF45_Q_YAW_OUT_DQ]
[H1:ASC-REFL_B_RF9_I_PIT_OUT_DQ]
[H1:ASC-REFL_B_RF9_I_YAW_OUT_DQ]
[H1:ASC-REFL_B_RF9_Q_PIT_OUT_DQ]
[H1:ASC-REFL_B_RF9_Q_YAW_OUT_DQ]
[H1:ASC-SRC1_P_IN1_DQ]
[H1:ASC-SRC1_P_OUT_DQ]
[H1:ASC-SRC1_Y_IN1_DQ]
[H1:ASC-SRC1_Y_OUT_DQ]
[H1:ASC-SRC2_P_IN1_DQ]
[H1:ASC-SRC2_P_OUT_DQ]
[H1:ASC-SRC2_Y_IN1_DQ]
[H1:ASC-SRC2_Y_OUT_DQ]
 

Displaying report 1-1 of 1.