This entry is meant to survey the sensing noises of the OMC DCPDs before the EOM driver swap. However, other than the 45 MHz RFAM coupling, we have no reason to expect the couplings to change dramatically after the swap.
The DCPD sum and null data (and ISS intensity noise data) were collected from an undisturbed lock stretch on 2015-07-31.
Noise terms as follows:
The downward slope in the null at high frequencies is almost certainly some imperfect inversion of the AA filter, the uncompensated premap poles, or the downsampling filter.
* What is the reasoning behind the updated suspension thermal noise plot?
* Its weird that cHard doesn't show up. At LLO, cHard is the dominant noise from 10-15 Hz. Its coupling is 10x less than dHard, but its sensing noise is a lot worse.
I remade this plot for a more recent spectrum. This includes the new EOM driver, a second stage of whitening, and dc-lowpassing on the ISS outer loop PDs.
This time I also included some displacement noises; namely, the couplings from the PRCL, MICH, and SRCL controls. Somewhat surprising is that the PRCL control noise seems to be close to the total DCPD noise from 10 to 20 Hz. [I vaguely recall that the Wipfian noise budget predicted an unexpectedly high PRCL coupling at one point, but I cannot find an alog entry supporting this.]
Here is the above plot referred to test mass displacement, along with some of our usual anticipated displacement noises. Evidently the budgeting doesn't really add up below 100 Hz, but there are still some more displacement noises that need to be added (ASC, gas, BS DAC, etc.).
Since we weren't actually in the lowest-noise quad PUM state for this measurement, the DAC noise from the PUM is higher than what is shown in the plot above.
If the updated buget (attached) is right, this means that actually there are low-frequency gains to be had from 20 to 70 Hz. There is still evidently some excess from 50 to 200 Hz.
Here is a budget for a more recent lock, with the PUM drivers in the low-noise state. The control noise couplings (PRCL, MICH, SRCL, dHard) were all remeasured for this lock configuration.
As for other ASC loops, there is some contribution from the BS loops around 30 Hz (not included in this budget). I have also looked at cHard, but I have to drive more than 100 times above the quiescient control noise in order to even begin to see anything in the DARM spectrum, so these loops do not seem to contribute in a significant way.
Also included is a plot of sensing noises (and some displacement noises from LSC) in the OMC DCPDs, along with the sum/null residual. At high frequencies, the residual seems to approach the projected 45 MHz oscillator noise (except for the high-frequency excess, which we've seen before seems to be coherent with REFL9).
Evidently there is a bit of explaining to do in the bucket...
Some corrections/modifications/additions to the above:
Of course, the budgeted noises don't at all add up from 20 Hz to 200 Hz, so we are missing something big. Next we want to look at upconversion and jitter noises, as well as control noise from other ASC loops.