J. Garcia, J. Kissel

This morning, trying to figure out why Jeff G. has been unsuccessful at getting data out of overnight, Matlab TFs of H2 SUS ETMY, over the past few days I discovered a few things needing cleanup:

(1) BIO CTRL switches were set such that the Test/Coil switch was set to Test -- i.e. the coil drivers were not receiving DAC output. These channels,
H2:SUS-ETMY_BIO_M0_CTRL (12 bit word channel)
H2:SUS-ETMY_BIO_R0_CTRL (12 bit word channel)
H2:SUS-ETMY_BIO_L1_CTRL (16 bit word channel)
H2:SUS-ETMY_BIO_L2_CTRL (16 bit word channel)
need to be switched to at least "aaa" for 12 bit words, or "8888" for 16 bit words, in order for any signal get from the DAC out to the coils. I've switched M0, R0, and L1 to "aaa", "aaa" and "8888," respectively. L2 however, must have its driver or BIO chassis powered off, 'cause the monitor read backs are stuck (not important immediately, but should be fixed eventually).

(2) The M0 chain's COILOUTF filter gains did not match the expected signs, with respected to T1200015 and/or E1000617. Further, (though in reality it didn't make a difference), FM2 and FM7 of R0's COILOUTF compensation filters were not clicked on, and should be, if the analog electronics are in State 1 (c.f. T1100507). I've fixed both of these.

(3) The band-limiting filters for the watchdogs had not been installed. These should be:
{IFO}:SUS-{OPTIC}_{ISOSTAGE}_WD_OSEMDC_BANDLIM_{DOF}_FM1 = 'LPF10'   = zpk([],[10],1,"n")
{IFO}:SUS-{OPTIC}_{ISOSTAGE}_WD_OSEMAC_BANDLIM_{DOF}_FM1 = 'bandLim' = zpk([0],[0.1;10;10],10.1504,"n")
{IFO}:SUS-{OPTIC}_{ISOSTAGE}_WD_ACT_BANDLIM_{DOF}_FM1    = 'bandLim'  = zpk([0],[0.1;10;10],10.1504,"n")
These are the same for all IFOs, all OPTICs, all ISOSTAGEs, and all DOFs. I have (by-hand) installed these into foton. I'll re-open the quest to get these automatically installed, using
${SusSVN}/sus/trunk/Common/MatlabTools/prepare.m

(4) Some important channels are not included in the frame builder, namely all of the TOP stage inputs to the DAMP filters:
H2:SUS-ETMY_{M0/R0}_DAMP_{DOF}_IN1_DQ
H2:SUS-ETMY_{M0/R0}_OSEMINF_{DOF}_IN1_DQ
There are other lower stage channels too (but the above we need immediately). Jeff G is working on getting them stored.


As it stands now, after I've fixed (1),(2), and (3), the M0 and R0 stages can actuate, their coil driver frequency response is compensated appropriately, the damping loops close, they're properly protected by the watchdog, and I was able to get one or two M0 DTT transfer functions out (and the data made sense), though I was using test point read backs instead of frame builder read backs (a for the time being functional work around, but nominally a no-no because it overloads the system).