Reports until 15:03, Monday 14 March 2016
H1 SEI
hugh.radkins@LIGO.ORG - posted 15:03, Monday 14 March 2016 - last comment - 08:17, Tuesday 15 March 2016(26059)
LHO End SEI CPSs now on 71MHz Sync Clock

WP 5773, FRS 4554 aka II 1058, ECR E1500244, D1400363

With the platforms down for the computer restarts today, seemed like a good time to get going on this.

Power down CPS Interface chassis, pull H1 St1 card & switch to slave (Jumper on P2,) pull dual plug power conditioning board & replace with single, switch cables from local sync to common 71MHz chassis sync cables.  Power on Timing Distribution Chassis, power on the CPS Interface Chassis.

I'll post before and after spectra of the CPS once computing is back up.

Comments related to this report
hugh.radkins@LIGO.ORG - 16:24, Monday 14 March 2016 (26061)
Link

Here are spectra of the local CPS on ETMX.  Reference from ~3am and currents from ~3pm (after swap obviously.)  No glaring issues at this point.

And here too is similar for ETMY--Offhand it looks like the Stage1 H2 card could use plugging in a few times as it is a little noisier now.  Likewise, Stage2 H3 is a little noisier as well.

Images attached to this comment
hugh.radkins@LIGO.ORG - 08:17, Tuesday 15 March 2016 (26071)
Link

Hey!  Super!  I got that backwards.  The current traces are less noisy! It is the old reference traces before the switch that had higher noise levels at EndY.  Dodged the extra labor on that one!