Daniel, Ross, Carl, Kiwamu,

WP#: 5957

We made two modifications on the h1omspi, h1susetmxpi and h1susetmypi models as follows.

• We added all the I and Q down sampled channels to science frame at 2 kHz.
• We added two new OMC DCPD signals which don't get attenuated by two 10 kHz poles of the whitening circuits.

We are ready for tomorrow's model restart during the maintenance period.

[I and Q signals to science frame]

Since all the I and Q down sampled signals have been already recorded in commissioning frame, we just added a star symbol to each channel name in the DQ text field in the simulink models. In total, 24 channels (8 channels from each model) will newly go to science frame at 2 kHz.

[New DCPD signals]

We decided to do a quick hack on the OMC whitening board so that we don't suffer from the two 10 kHz poles (technically, 14 and 18 kHz from the differential receiver stage, see alog 21131) to obtain a better signal to noise ratio. Some more details of this quick hack will be reported by Daniel and Stefan later. In the mean time, we have edited the h1omcpi model so that it is capable of handling these two signals. In the first attachment it shows the two new ADC inputs (adc_0_14 and adc_0_15) which then go to a subblock called PI_DCPD. One can choose whether the normal DCPD is used for the PI error signal or the new signals by the two choice blocks that are behind the PI_DCPD block.

Once we become able to damp the PI modes using the new DCPD signals, we should get rid of the old DCPD signals. But for commissioning purpose, we are leaving the normal DCPDs available for now.

Also, we added these two new signals to commissioning frame at the full sampling rate at 64 kHz. So, in total, we now have four 64 kHz DQ channels, which should be reduced to 2 or 1 channels as we complete the commissioning at some point in future. The new DQ channels have the names as PI_DCPD_64KHZ_A(B)HF. Note that in order to save the test points for the normal DCPD signals, we pulled them out of a subblock and placed them at the top level as seen in the first attachment.

In the PI_DCPD subblock, we have placed controlled-IIR-fitlers so that they can be synchronized with the analog board settings as have been done in the LSC and ASC models. See the second attachment.

All the changes are checked into the SVN repo. We made sure that they compiled without errrors.