This is a quick note on the SRM dither loop.

The SRM dither loop does not seem to give us the optimum SRC alignment when the PSL power is above 50 W in this evening. I don't remember seeing this problem two days ago (28577). Today at one point, we had a lockloss at 50 W when slowly introducing an offset in the PRM pointing from 0 to 0.5 QPD count over 5 min. During this engagement process, AS90 kept decreasing while the carrier recycling gain kept increasing. In the next lock stretch, we opened up the SRM dither loop and started manually aligning SRM. At the optiumum point where the signal recycling gain (i.e., AS90 / POP90) was maximized, the dither-based error signals had a non-negligible offset in both pitch and yaw (on the order of 0.005 at the input of the control filters for both).