Reports until 12:27, Thursday 28 July 2016
X1 DTS
david.barker@LIGO.ORG - posted 12:27, Thursday 28 July 2016 (28704)
Testing minimal DAQ data which can be sent from 64kHz front end model

Jim and I tested for the minimal data which can be sent from a 64kHz model to the DAQ. We used x1ioppsl0 as the test model.

Background: When we installed the first SUS PI model on H1 last year the users wished to write two of the channels to the DAQ at 2kHz, this  caused runtime errors. I fixed the errors by adding two other channels at the full 64kHz rate, similar to what RCG does if there are no DAQ channels selected. Since it is not possible to set acquire=0, I set the data to zero to maximize compression.

Rolf mentioned that the rule of two channels at full rate has been removed. To see what the minimum rate is, I created a DAQ block on x1ioppsl0 and tried various combinations of one and two channels at various rates.

The mimimum DAQ configuration is one channel at 8192Hz. If the data content on MX is 4096 or less, the model will not run and the dmesg error "DAQ size too small" is shown. This is also true if two 2048Hz channels are selected, as was the case with the PI model. We suspect adding a third 2kHz channel would have avoided the problem.

Because acquire=1 will be selected for the 8kHz channel, the trick of ensuring the data is zero should be used to minimize impact on the frame size.