J. Kissel

In the interest of providing supporting evidence for SUS data storage rates (see newly minted T1600432), I've taken a look at the coil output spectrum at the output of RM1, RM2, OM1, OM2, and OM3 during the latest nominal-low-noise lock stretch using both the requested DAC output (M1_MASTER_[UL,LL,UR,LR]_OUT) and the voltage monitors (M1_VOLTMON_[UL,LL,UR,LR]).

The messages: 
- On the OMs, for the current alignment scheme (OM1&2 used for 1-2 Hz BW "DC" centering on AS WFS; OM3 used at similar BW to center the beam onto the OMC breadboard), it's totally fine to store the OM VOLTMONs at the lowest possible "fast" rate of 256 Hz. There is no coherence between the output of these VOLTMONs and the requested drive (MASTER OUT) above ~5-10 Hz, and the requested drive is rolling off as a function of frequency.

- On the RMs, for the current alignment scheme (RM1&2 used for 1-2 Hz BW "DC" centering on REFL WFS), the coil requested output is completely coherent with the VOLTMONs out to ~1 [kHz]. That's silly. I've informed Jenne of this and she's identified several places that are lacking sensible low-pass filtering, which she'll install now that she's got the infrastructure to do so (LHO aLOG 30247). Once this is rectified, I'll confirm in comment to this aLOG, but I suspect that it'll also be totally fine to store the RM VOLTMONs at the lowest possible "fast" rate of 256 Hz.

- Because these poor suspensions are always the second last to be thought about, Ed's study of the coil driver monitors in support of FRS Ticket #5135 -- see LHO aLOGs 15176, 15312, and 17890 -- did not cover any of the RMs or OMs. As such, the problems with these monitors have not yet been called out explicitly. In doing this study, I've identified all of the problems with the HTTS VOLTMONS:
     - The following VOLTMONs are missing a factor of 2 in their gain (i.e. they're 2.0 lower than the expected, requested output): 
            OM1 UR & LR
            RM1 UR & LR
            RM2 UL & LL.
        Because this fault seems to come in pairs on a given side of the optic, my guess is that 1/2 of a differential leg is not making contact or is busted. 
     - The following VOLTMONs are just down-right busted and show garbage:
            RM1 LL
            RM2 LR.
I'll leave it to CDS as to whether they want to create individual FRSs on these, or just add to FRS Ticket #5135.

Details:
I've calibrated both the requested drive and measured drive into Volts right at the output of the DAC. Remember, the HTTSs (i.e. the RMs and OMs) were ISC built suspensions, which had to be different -- they have 16-bit DACs, not 18-bit DACs. Also, the low-pass filter of the HAM-A driver is permanently jumpered ON. 
Thus, The DTT calibrations into DAC [V] are as follows:
   MASTER OUT
     Gain: 3.0518e-04     (from the DAC gain of 20 / 2^16 [V dac/ct])
     Poles: (none)
     Zeros: (none)

   VOLTMON
     Gain: 2.7555e-04     (from ADC gain of 40 / 2^16 [V/ct] and the HAM-A driver gain of 1 / 2.215 [V dac/V out])
     Poles: 10, 21
     Zeros: 0.9, 212

More details of the HAM-A driver (D1100117) can be found in T1200264. Note for the attached ASDs, I faked the calibration of the factor-of-two busted channels by using a gain of 2 * 2.7e-4 = 5.5e-4 [V dac/ct].

The data templates in my home folder here:
/ligo/home/jeffrey.kissel/2016-10-05/
2016-10-05_H1SUSOM1_MASTEROUT_vs_VOLTMON.xml
2016-10-05_H1SUSOM2_MASTEROUT_vs_VOLTMON.xml
2016-10-05_H1SUSOM3_MASTEROUT_vs_VOLTMON.xml
2016-10-05_H1SUSRM1_MASTEROUT_vs_VOLTMON.xml
2016-10-05_H1SUSRM2_MASTEROUT_vs_VOLTMON.xml