M. Pirello

This FPGA code ( E1200034 ) disconnects the 1pps signal from the 4 internal LED's and grounds them.  All four timing comparators at LHO were updated to v5.

S1107952 in the CER

S1201224 in the MSR

S1201886 at X end

S1201222 at Y end

Work Permit 6256