Reports:
- DBB shutter open results in a huge noise bump issue
- peaks are smaller, but still there wtih DBB closed off
- PMC high voltage noise: (HV drive coherent, better readout--> peaks visible, realignment of PMC improved peaks / but hump is still there)
- coupling mechanism from PMC length offset to DARM unclear
- PMC UGF was 600Hz instead of 5kHz. going to (nominal) 5kHz made DARM noise worse.
- Reducing PMC loop gain further is not helping enough
- projection ~x2 below noise bump.
- PMC wrong polsarization light? (would be almost resonant, and therefore sensitive to PMC length noise) not clear how the coupling downstream of PMC works.
- Jitter spectrum looks smooth - thermally diven? Is so, other modes also produced... 20 mode...!
- picomotor steering into PMC to test...
- SRM: alignment affects jitter bump... !?
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To do:
- 9MHz missing in reflection (x5 missing: (2W-50W we are loosing 2.5x)) - > find 1W of 9MHz (what was the conclusion for REFL9 gain?)
- Low noise operaion at 12W, 24W (available in guardian)
- ER9 TCS configuration?
- PMC pole down
- Donut jitter verification? How?
Things to copy from LLO:
- Black glass for ETM camera to eliminate back-scatter
- ESD bias noise / zero crossing * run with ESD offset /reduced bias
- Compensation plate alignment ?
- PCAL switch (too much noise?)
"classical" tunings to be redone at operating point:
- A2L / ASC tuning
-Aux loops feed-forward
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Timeline:
- HPO: Earliest: Monday 10/24
- Option: 12W low power test first
- ER10 start LLO Oct 31 / LHO 10 days later
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Another to-do that was discussed: Make-up air on/off test when IFO is locked.