Reports until 15:47, Tuesday 25 October 2016
H1 CDS
david.barker@LIGO.ORG - posted 15:47, Tuesday 25 October 2016 (30864)
h1isce[x,y] restarted after inadvertent timing glitch

The power supplies for the h1isce[x,y] timing slave cards were inadvertently glitched this morning during maintence when diagnostics equipement was being plugged in. We have labeled these power outlets to prevent future occurance. Models were restarted with no problems.