Jim Dave Daniel
This implements ECR E1600358.
The internal processing rate of the ASC IMC model has been increased from 2048 Hz to 16384 Hz. The data rate of the DAQ channels was kept the same and stayed at 2048 Hz. It is now possible to perform online jitter measurements using the IMC WFS testpoints up to the full Nyquist frequency.
WP6373 details
DAQ:
h1ascimc.mdl file changed just to increase rate in CDS-BLOCK from 2k to 16k.
ASCIMC_MASTER.mdl file changed, the ODC DAQ channel H1:IMC-ODC_CHANNEL_OUT_DQ did not have its rate defined (defaulted to old model rate of 2048). We explicitly set its rate to be 2048 Hz as this ECR stipulated that no DAQ frame channel could increase its rate beyond 2kHz. All other DQ channels had their rates defined at 2048 in the DAQ-CHAN lists and no changes were required. One subblock had a separate DAQ-CHAN list, also did not require any changes.
IPC:
The h1ascimc model is the sender to 11 IPC channels (all dolphin). The recipient models are h1susmc[1,2,3], h1lsc and h1odcmaster. The H1.ipc file was backed up and then hand edited to change these 11 ipc channels from 2048 to 16384. All recipient models were then compiled and installed against the new IPC file.
Restart Order:
Because of the IPC communications, the restart order was
stop the IPC receiver models (h1susmc[1,2,3], h1lsc, h1odcmaster)
stop and start the h1ascimc
start the IPC receivers models
DAQ:
technically these changes did not require a DAQ restart because all DQ channels retained their rates. Practially however the ini file's content changed because the datarate in the [DEFAULT] section changed, and a DAQ restart was required to resync the Check Sum of the INI file.
Testing:
I verified that the H1:IMC-ODC_CHANNEL_OUT_DQ (which is now a down-sampled UINT32 channel) has the same signal.
I took one representative IPC receiver channel (H1:SUS-MC1_M3_ISCINF_Y_IN1_DQ) to show that the removal of upconversion at the 16k receiver did not change the signal.