WP7120 Sheila and Dave:
The h1lsc model was modified to add two new SHMEM IPC senders. The h1omc model was modified to add two new SHMEM receivers (for the new h1lsc channels) and two new PCIE (Dolphin) sender channels. Each of the SUS ITM models were modified to add one new PCIE receiver channels to receive from h1omc.
The models were compiled and installed, the modifications to H1.ipc is shown below.
The models were restarted in the order: h1lsc, h1omc, h1susitmx, h1susitmy.
Because IPC receivers had been added, their slow channels were added to the DAQ INI file, requiring a DAQ restart.
After the DAQ was restarted, I discovered two things:
1. I forgot to check the write status of h1tw1 before restarting. I have checked that h1tw1 was writing raw minute trends every 5 minutes.
2. The EDCU did not come back to a GREEN status. The reason is that a new Guardian node ALS_DIFF_ETMY_ESD had been created (and added to the Guardian DAQ INI file) but is not being ran. We'll fix this tomorrow, for now the EDCU is RED, and it is missing these 19 guardian channels. The disconnected channel list is shown below.
ALS_DIFF_ETMY_ESD Guardian DAQ channels (disconnected):
H1:GRD-ALS_DIFF_ETMY_ESD_VERSION
H1:GRD-ALS_DIFF_ETMY_ESD_EZCA
H1:GRD-ALS_DIFF_ETMY_ESD_OP
H1:GRD-ALS_DIFF_ETMY_ESD_MODE
H1:GRD-ALS_DIFF_ETMY_ESD_STATUS
H1:GRD-ALS_DIFF_ETMY_ESD_WORKER
H1:GRD-ALS_DIFF_ETMY_ESD_LOAD_STATUS
H1:GRD-ALS_DIFF_ETMY_ESD_ERROR
H1:GRD-ALS_DIFF_ETMY_ESD_CONNECT
H1:GRD-ALS_DIFF_ETMY_ESD_EXECTIME
H1:GRD-ALS_DIFF_ETMY_ESD_STALLED
H1:GRD-ALS_DIFF_ETMY_ESD_NOTIFICATION
H1:GRD-ALS_DIFF_ETMY_ESD_NOMINAL_N
H1:GRD-ALS_DIFF_ETMY_ESD_REQUEST_N
H1:GRD-ALS_DIFF_ETMY_ESD_STATE_N
H1:GRD-ALS_DIFF_ETMY_ESD_TARGET_N
H1:GRD-ALS_DIFF_ETMY_ESD_OK
H1:GRD-ALS_DIFF_ETMY_ESD_ARCHIVE_ID
H1:GRD-ALS_DIFF_ETMY_ESD_TIME_UP
H1.ipc additional channels:
[H1:LSC-OMC_ITMX]
ipcType=SHMEM
ipcRate=16384
ipcHost=h1lsc0
ipcModel=h1lsc
ipcNum=59
desc=Automatically generated by IPCx.pm on 2017_Aug_27_13:36:33
[H1:LSC-OMC_ITMY]
ipcType=SHMEM
ipcRate=16384
ipcHost=h1lsc0
ipcModel=h1lsc
ipcNum=60
desc=Automatically generated by IPCx.pm on 2017_Aug_27_13:36:33
[H1:OMC-ITMX_LOCK_L]
ipcType=PCIE
ipcRate=16384
ipcHost=h1lsc0
ipcModel=h1omc
ipcNum=385
desc=Automatically generated by IPCx.pm on 2017_Aug_27_16:09:43
[H1:OMC-ITMY_LOCK_L]
ipcType=PCIE
ipcRate=16384
ipcHost=h1lsc0
ipcModel=h1omc
ipcNum=386
desc=Automatically generated by IPCx.pm on 2017_Aug_27_16:09:43
Here is the start log for this afternoon's changes:
2017_08_27 16:16 h1lsc
2017_08_27 16:18 h1omc
2017_08_27 16:18 h1susitmx
2017_08_27 16:20 h1susitmy
2017_08_27 16:23 h1broadcast0
2017_08_27 16:23 h1dc0
2017_08_27 16:23 h1fw0
2017_08_27 16:23 h1fw1
2017_08_27 16:23 h1fw2
2017_08_27 16:23 h1nds0
2017_08_27 16:23 h1nds1
2017_08_27 16:23 h1tw1
These model restarts were intended to allow us to send the DARM signal to the ITMs. Previously, the LSC model had PCIE IPCs to the ITMs, while for the ETMs the LSC had shared memory IPCs to send the signals to the OMC model, where they are summed with the DARM signals and send to the end stations using RFM IPC.
Today Dave and I modified the models so that the ITM signals would be routed in a way more similar to the ETMs, so that the LSC has PCIE SHM IPCs to send the signals to the OMC model, then PCI IPCs to send the signals to the ITMs.
We were able to relock fine after this, but the LSC feedforward which is routed through the new IPCs is not well tuned. For MICH, we used to operate with a filter gain of -15.9, today I got some decent MICH subtraction (not well tuned) with a gain of +600. For SRCL we started to get a small amount of subtraction with a gain of around 22, while our nominal gain was -1.
I don't understand why this is happening, but will leave the IFO to Thomas Vo for some Hartman tests. Hopefully we look at what happened early in the morning.