All fixed now:
1. This morning we noticed that the slow voltage monitors indicated a failure. This was tracked to the +24V in EY being only at +22V.
2. Looking at the alarmed OK readbacks of the common mode boards, we noticed that the error flag indicated all was fine. This was due to a missing call to the error handler.
3. The DC power readbacks now have offset adjustment, transimpedance gain and optical response settings. However, due to a programming error, the save/restore of these settings was not working.
4. The RF power monitors of the demod and PFD boards always indicated relatively high LO readings. We tracked this to an error in the equation which is used to translate volts into dBm. 
5. While looking at the LO input to the ALS demod board we noticed that the RF level was marginal at ~7dBm. The additional loss is due to the delay line phase shifter feeding the LO. However, there was a 2dB attenuator attached to the input of the delay line. Removing it gave us a nominal 9-10dBm.
6. Last Thursday we noticed that we don't have a timing system readback from the 24MHz RF source in EY. The first problem was a fiber module with the wrong model number in the fanout. 
7. The second problem was that the RF source never synchronized to GPS. After trying everything we finally reprogrammed the FPGA PROM which resolved the issue. Not sure how this unit passed testing, but this almost certainly affects our cavity length measurement which needs to be repeated.