Sheila, Stefan

- SRC2, the ASC_AS_C pointing loop using the right actuator combination of SR2 and SRM, was straight forward: gain of 20, integrator on, done.
- For SRC1, we first dithered SRM in PIT and YAW to find the optimal spot.
- Then we phased AS_A_RF72 in this configuration by putting all DC signal into the I quadrature, using the ezcaservo below. This naturally zeroed the Q_PIT and Q_YAW error signals. Both had decent sensitivity to the SRM.
- So we closed the loops. Attached are some snapshots.
- Note: There was no signal in AS_B_RF72.
- I added everything to Guardian, but didn't test the engagement yet, so go slow through ENGAGE_SRC_ASC the next time.
- Also SRC2 can probably take 20dB more gain (take out FM1), but we didn't bother for tonight.
- Finally SRC1 can probably also run with higher gain, but at the current gain the FM2 integrator results in an overshoot because it fights with the SRM top mass integrator.

- We then set the ringheater X to 0.28 Watt total (0.14 Watt each half-heater). The ASC system should take care of the alignment (except the SOFTies).
- We left the IFO locked in that state for a stability check.



The ezcaservo lines for phasing:

ezcaservo -r H1:ASC-AS_A_RF72_Q1_MON -g -0.2 -f 1 H1:ASC-AS_A_RF72_SEG1_PHASE_R
ezcaservo -r H1:ASC-AS_A_RF72_Q2_MON -g -0.2 -f 1 H1:ASC-AS_A_RF72_SEG2_PHASE_R
ezcaservo -r H1:ASC-AS_A_RF72_Q3_MON -g -0.2 -f 1 H1:ASC-AS_A_RF72_SEG3_PHASE_R
ezcaservo -r H1:ASC-AS_A_RF72_Q4_MON -g -0.2 -f 1 H1:ASC-AS_A_RF72_SEG4_PHASE_R