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Reports until 18:59, Wednesday 12 September 2018
H1 ISC (ISC)
hang.yu@LIGO.ORG - posted 18:59, Wednesday 12 September 2018 (43977)
More ASC loop gain for power up

We took a DHARD YAW measurement at 2 W at GRD state DARM_TO_DC_READOUT. See the first attached plot. The UGF was 4 Hz yet it seemed fine to increase it up to 6 Hz as we still had a phase margin of 50 deg. Thus we increased the DH_Y gain from -40 to -60. Similarly we increased DH_P gain from -30 to -50 to make the loop more robust for power up.

On the other hand, we noticed some oscillation in CH_P at 6 Hz (and also seen in many other loops as shown in the second plot; yet CH was the only loop had a UGF high enough at this point that could potentially cause gain peaking). The oscillation was present even before we increase the DH loops gain. We tried to reduce CH P gain yet the gain peaking got worse. Instead we increased CH_P gain from 0.3 to 0.4 and it slightly reduced the 6 Hz oscillation. Also turning up the DH loop gains also mildly helped. See the third plot. The green trace was before all the gain increasing and the red one was after we increased CH_P from 0.3 -> 0.4, DH_P from -30 -> -50, and DH_Y from -40 -> -60.

Will try to get a high-resolution CH OLTF once we have chance.

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