Reports until 14:39, Sunday 07 October 2018
H1 ISC
sheila.dwyer@LIGO.ORG - posted 14:39, Sunday 07 October 2018 - last comment - 15:23, Monday 08 October 2018(44378)
Improved recycling gain means more power on REFL, tried switching to REFLAIR

This is a late alog of work done yesterday afternoon with Gabriele. 

Friday evening Daniel and I noticed that we have about 10 times more power on our REFL diodes than in O2 according to the readbacks, with 1mW on the in vac REFL LSC diode when we are locked at DC readout.  Yesterday we tried to check that the amount of DC power roughly makes sense, which it does.  Since this is one thing that is different than O2, we suspected it could be contributing to our fast lockloss problems.  

As a quick test yesterday afternoon Gabriele and I switched the CARM control from REFL to REFLAIR, since it has a fourth of the amount of light that in vac REFL has.

Ideas for things to try next:

Non-image files attached to this report
Comments related to this report
jenne.driggers@LIGO.ORG - 07:29, Monday 08 October 2018 (44386)

We definitely need to fix the fast locklosses, but I think that the 45MHz is important to look at as well.

We have never reduced the 9MHz before power-up.  It is the 45MHz that we reduced by 3dB before power-up.  In O2, the 9MHz was reduced by 6dB after we've transitioned to the low noise ESD at high power.  So, we should look at both the 9 and the 45, just in case it's the 45 causing weird saturations and weird behavior in the REFL diodes, even though it's the 9 that we use for CARM control.

It's this 45MHz reduction state that I tried last week, and it failed and caused a lockloss, although I have not yet determined why.

daniel.sigg@LIGO.ORG - 12:10, Monday 08 October 2018 (44403)

Reflected power on lock is around 6.5% of unlocked power.
9MHz sideband power on input light is 1.8% (Γ~0.191); most of it will show up in reflection.
45MHz sideband power on input light is 3.3% (Γ~0.251); around half will show up in reflection.

So, the reflected sideband power is around 3.5%.

hang.yu@LIGO.ORG - 14:55, Monday 08 October 2018 (44410)

Sheila, Hang

In our previous calculation LHO:44370 we only kept tracking the carrier field. As Daniel pointed out, the sidebands also contributed a significant amount of power in the REFL port. Thus we updated our calculation to include the RF sidebands.

In the first figure we show the locked / unlocked refl power as a function of PRG for the current configuration, and the second plot for the O2 configuration (9 MHz mod depth is about a factor of 2 lower than current setup).

It seems that the measured result is consistent with the theoretical model prediction. For now P_refl (resonance) / P_refl (off) = 6.5% corresponds to a PRG of ~ 46.5, consistent with our measured PRG of 48.

For O2 w/ PRG of ~ 30 and 6 dB lower 9 MHz mod depth, we should expect P_refl (resonance) / P_refl(off) ~ 1%, also consistent with the measured value.

Also for the 45 MHz, we found that about 20 % of the power is reflected and 80 % transmitted, thus its contribution to the REFL port is more like 0.5%.

The code for doing the calculation is available at /ligo/home/hang.yu/Desktop/pyComm/refl_vs_trans.ipynb

Images attached to this comment
jenne.driggers@LIGO.ORG - 15:23, Monday 08 October 2018 (44411)

I discovered that I had a typo in the reduce modulation depth states, which are a remnant from when I cleaned up all of the guardian code a few months ago.  Instead of setting some TRAMP values to 30 seconds in preparation for increasing digital PD gains to compensate for lowering the modulation depth, I was setting the PD GAIN values to 30 (they should be order 1, not 30). 

This is now fixed in both the 45 MHz and 9 MHz states, and loaded.