D. Barker, R. McCarthy, J. Kissel
WP 7890
ECR E1800306
IIET 11690

In order to mitigate DAC glitching that's a known, remaining problem of 18-bit DACs, we've replaced the DAC card on the currently-used-for-DARM-control H1SUSETMX ESD system with a 20-bit DAC (see above mentioned ECRs for further doucmentation). To be clear, this impacts the bias (or "DC") path and all four ESD quadrant paths. 

Most importantly, this change means that the calibration of the DAC changes from 20 Vpp / 2^18 ct to 20 Vpp / 2^20 ct, thus reducing the amount of volts per requested count by 4. 
As such, I've installed a filter in the ETMX ESDOUTF bank, in FM4, called "20BitDAC" which is a gain of 4.0. This should make the DAC card change roughly transparent to any control loops that pass through the ESD.

This required:
 - Changing the h1susetmx front-end model at the top level to use a representative 20-bit DAC part (see first attachment)
 - Changing the h1iopsusex f.e. model at the top level to also use a representative 20-bit DAC part (see second attachement)
 - Killing all front-end models (including the IOP) on the h1susex computer
 - Replacing the DAC card in the h1susex I/O chassis
 - Restarting all models on the h1susex front-end computer, including h1susetmx and h1sustmsx
 - Adding a filter in the ESDOUTF bank (as described above)

We're in the process of confirming that the DAC card is functional by charge measurements. We'll do more complete tests once maintenance is over, culminating in a precision measurement of the new actuation strength with the full IFO such that the calibration group can update their actuation model and correct for the change in interferometer DELTAL_EXTERNAL production.