ODC removal (as per ECR 12045) has begun. Summary:
- All ODC IPC senders were removed from all CS ISIs, HAM1 HPI, h1asc, h1iscey, h1caley front end models.
- All existing INJ logic was left in place, including the full INJ ODC monitoring path from h1calex -> h1iscex -> h1odcmaster (see subsequent log on INJ changes).
- All IPC receivers were removed from h1odcmaster, and all inputs were grounded, except the IPC receiver from h1iscex (see below).
- OBSERVATORY READY/INTENT/OBSERVE logic was removed from ODC. This will be replaced by functionality in the guardian system (to be done).
Detailed front end changes:
- h1odcmaster: All IPC receivers were removed, and the corresponding inputs to the ODC MASTER block were grounded, EXCEPT the H1:ODC-X_CHANNEL_RFM IPC receiver from the X end (h1iscex). All GRD EPICS channels were removed. All OBSERVATION READY/INTENT logic was removed. The primary H1:ODC-MASTER_CHANNEL_LATCH channel was left in place.
- h1iscey: All ODC blocks and related IPC senders/receivers were removed.
- h1iscex: All ODC-related IPC senders/receivers were removed, and the corresponding inputs to the ODC block were grounded, EXCEPT the H1:CAL-X_ODC_SHMEM IPC receiver from h1calex.
- h1caley: The PINJY block was completely removed, including all PINJY ODC logic. The IPC SHMEM sender to h1iscey was also removed. A new IPC RFM receiver from the h1calinj model was added (see subsequent log about INJ changes).
- h1asc: All ODC blocks and related IPC senders were removed (see subsequent log about ASC model changes).
- SEI: All ODC-related IPC senders were removed from all corner station ISI models, and the HAM1 HPI model (see subsequent log about SEI model changes)
Further removal of ODC from the rest of the system (ISC, SUS, PEM, etc.) is deferred to later maintenance.
Following models were changed to remove ODC completely and compiled but not installed. Deferred to another opportunity.
h1ascimc (1 IPC sender (PCIE) and an entire ODC block were removed, doesn't use the library, one less fast channel on the frame)
h1pslpmc (1 sender (SHMEM) as well as an entire ODC block was removed from h1 model, ODC-related things were purged from the library, no change in fast channels)
p1psliss (2 receivers (SHMEM) for FSS and PMC as well as two ODC blocks were removed from h1 model, ODC-related things were purged from the library, one less fast channel on the frame)
h1pslfss (1 sender (SHMEM) as well as an ODC block were removed from h1 model, ODC-related things were purged from the library, no change in fast channels)
h1tcscs (1 sender (SHMEM) as well as an ODC block were removed from h1 model, ODC-related things were purged from the library, one less fast channel on the frame)
h1iscex (done by Jamie, no change in fast channels)
h1alsex (1 sender (SHMEM) as well as an ODC block were removed from h1 model, doesn't use library, one less fast channel on the frame)
h1alsey (1 sender (SHMEM) as well as an ODC block were removed from h1 model, doesn't use library, one less fast channel on the frame)
h1lsc (1 sender (PCIE) and an ODC block are removed from the h1 model, doesn't use library, one less fast channel on the frame)
h1omc (1 sender (PCIE) as well as an ODC block were removed from h1 model, ODC-related things were purged from the library, one less fast channel on the frame)
h1pemex (1 sender (SHMEM) as well as an ODC block were removed from h1 model, doesn't use library, no change in fast channels)
h1pemey (1 sender (SHMEM) as well as an ODC block were removed from h1 model, doesn't use library, no change in fast channels)
all SEI models at the end stations (done by JeffK)
Following models are yet to be changed.
all sus models (TBD by JeffK)
Update on Jan 22
During the maintenance on Jan22, the following models without ODC were installed.
h1lsc, h1ascimc, h1omc, h1iscex, h1alsex, h1alsey, h1tcscs, h1pemex, h1pemey.
(h1asc was updated and installed for something unrelated to ODC.)
Remaining frontends that are yet to be replaced with new ones without ODC:
All SUS (models are yet to be changed/compiled).
All end station SEI (models are ready).
h1pslpmc, h1pslfss, h1psliss (models are ready).
Remaining frontends that will be changed again after new HW injection infrastructure is confirmed to work by transient injection group(s):
h1calex (model is yet to be done, PINJX will be completely removed).
h1odcmaster itself (this will be retired).
Update Feb/04/2019
All SUS models were modified to remove ODC, compiled successfully, but not installed. These are:
h1susetmx, h1susetmy, h1susitmx, h1susitmy, h1susbs, h1suspr3, h1suspr2, h1susprm, h1sussr3, h1sussr2, h1sussrm, h1susmc1, h1susmc2, h1susmc3, h1susomc, h1susopo, h1susim (and h1sustmsx and tmsy and h1sushtts on Feb/05/2019)
One PCIE IPC sender and one fast channel were removed per each model, as well as many EPICS channels. One new EPICS channel (ODCCHAN_PLACEHOLDER) was added per each model.
Library parts (QUAD_MASTER, QUAD_ITM_MASTER, BSFM_MASTER, HSTS_MASTER, HLTS_MASTER, OMCS_MASTER, OPOS_MASTER) are still compatible with old models, so if you want to compile any of old sus models with the new library you can. In that case ODC IPC will be plugged to zero.
Attached are typical before/after view of the library parts.
Boo. I just assumed that MC1, MC2 and MC3 all use HSTS_MASTER library part, but MC2 actually uses MC_MASTER part. I only edited HSTS_MASTER and individual model (h1susmc1, 2, 3).
As a result, ODC was not completely removed out of h1susmc2. This is going to be fixed in the next opportunity.