This test is now complete.  Times of bit flips will be posted soon.

The GDS-CALIB_STATE_VECTOR did catch transitions, but we're off by 1-4 clock cycles on each of the transitions.  The relevant bits in the attached plot are Obs. ready, which corresponds to the READY state obtained from the GRD-IFO_READY channel and Obs. intent, which corresponds to the INTENT state obtained from the GRD-IFO_INTENT channel.  The first READY transition gets picked up by CALIB_STATE_VECTOR 1 clock cycle late and all future READY transitions are 3 clock cycles late.  All transitions from INTENT=0 to INTENT=1 are 3 clock cycles late (I think, but see question in purple below), and all transitions from INTENT=1 to INTENT=0 are 4 clock cycles late.  

Summary of relevant transitions from Guardian and how CALIB_STATE_VECTOR picked it up:

1. T0 = 11233706149 (all bits 0/False) <- Correctly picked up by CALIB_STATE_VECTOR
2. +000.1250: READY=1 (test begins, TEST node achieves "lock" (OK), system achieves READY) <- CALIB_STATE_VECTOR picked up READY transition at +000.1875 (1 clock cycle late)
3. +015.8750: INTENT=1 ("OBSERVE" state requested) <- CALIB_STATE_VECTOR picked up INTENT transition at +016.0625 (3 clock cycles late).  If this lines up with 3. then it is 3 clock cycles late, but if it lines up with 4. then it is on time.  I had thought 3. meant GRD-IFO_INTENT was set to 1; is that correct?
4. +016.0625: OK=1 ("OBSERVE" state achieved) 
5. +032.0000: OK=READY=INTENT=0 (TEST node "lock loss") <- CALIB_STATE_VECTOR picked up READY transition at +032.1875 (3 clock cycles late) and INTENT transition at +032.25 (4 clock cycles late).
6. +045.4375: INTENT=1 ("OBSERVE" state requested) <- CALIB_STATE_VECTOR picked up INTENT transition at +045.625 (3 clock cycles late)
7. +052.1250: READY=1, INTENT=0 (TEST node achieves OK, INTENT reset due to MANAGED mode) <- CALIB_STATE_VECTOR picked up READY transition at +052.3125 (3 clock cycles late) and the INTENT transition at 52.375 (4 clock cycles late)
8. +063.1250: INTENT=1 ("OBSERVE" state requested) <- CALIB_STATE_VECTOR picked up INTENT transition at +063.3125 (3 clock cycles late)
9. +063.3125: OK=1 ("OBSERVE" achieved)
10. +070.0000: MODE=0 (MODE set to "AUTO")
11. +078.6875: READY=OK=0 (TEST node "lock loss", INTENT remains =1 due to AUTO mode) <- CALIB_STATE_VECTOR picked up READY transition at +078.875 (3 clock cycles late)
12. +091.6875: READY=1 (TEST node achieves OK) <- CALIB_STATE_VECTOR picked up READY transition at +091.875 (3 clock cycles late)
13. +092.1250: OK=1 ("OBSERVE" achieves OK, previous INTENT respected due to AUTO mode)
14. +101.3125: MODE=1 (mode reset to MANAGED)
15. +113.3125: READY=INTENT=OK=0 (TEST node "lock loss", conclusion of test) <- CALIB_STATE_VECTOR picked up READY transition at +113.5 (3 clock cycles late) and the INTENT transition at +113.5625 (4 clock cycles late)

Maddie, this was my fault, being both imprecise and looking at the leading edge of the transitions instead of when theey land on the value shown.  I've gone through with a finer toothed comb and updated the values to their precise values as recorded by the DAC (I also fixed the T0 GPS time, which accidentally had an additional digit):

0. 1233706149
1. +000.1250: READY=1
2. +016.0625: INTENT=1
3. +016.2500: OK=1
4. +032.1250: OK=READY=0
5. +032.1875: INTENT=0
6. +045.5625: INTENT=1
7. +052.2500: READY=1
8. +052.3125: INTENT=0
9. +063.2500: INTENT=1
10. +063.4375: OK=1
11. +070.1250: MODE=0
12. +078.8125: READY=OK=0
13. +091.8125: READY=1
14. +092.2500: OK=1
15. +101.4375: MODE=1
16. +113.4375: READY=OK=0
17. +113.5000: INTENT=0

I think this accounts for all the discrepancies that Maddie saw.  Apologies, Maddie.