Jenne, Sheila, Keita, Jamie, Danny

Before leaving early because of the weather, we did a little bit of interferometer locking.  

• In the early part of the day there was some difficulty with ALS and locking which might have been related to the wind.  The winds stayed steady through the day but we were able to get through the locking sequence several times anyway.
• We had one lockloss while engaging the dither loops, so we reverted some changes:  In the PIT3 loop there was a factor of 10 more gain than last week due to an increase in the DEMOD_SIG gain, which we have taken out.  We also moved the dither frequency for PIT5 back to 6.9 Hz, and changed the gains, amplitudes and bandpass to the way it was last week.  We did this by hand and were able to get through it OK, changes have been made and loaded in the guardian but not tested. 
• We looked in more detail at the locklosses and glitches that we had while powering up last night.  The power into the IMC had a steady increase, the glitches only appeared in the mode cleaner transmission.  The glitches are approximately co-incident with the steps in IMC fast gain.  We can see large glitches which seem to saturate the readback of IMC-I (monitor after the sum of the IMC and refl signals on the IMC servo), and we can see that the output of the common mode servo is getting large each time the servo gain changes.  The attached plot is my attempt to show this, made from home.  As far as we know there haven't been any changes to the common mode servo or settings changes, although we can do a more thorough check. 
• The FSS transmission diode was reading around 2.1 V last night, and after Peter King adjusted the refcav alignment today we have about 3 V, which should is the same as when Peter measured the FSS loop in January.  Even a 6dB change in the optical gain should be OK with this transfer function, so we don't think that the change in FSS alignment explains our difficulties. 

We had one chance to try powering up today before getting off site, we actually did survive the power up but the large glitches were visible.  (Attached plot).  That lock was lost in the step LOWNOISE_LSC which is engaging the LSC feedforward, although it looks like the large pitch drive which saturated ETMX L2 starts earlier, when we are switching DARM control back to ETMX with the ESD in low noise.  1234219824