J. Kissel

While playing around with the new infrastructure for the HPDS, which requires a DAC output of -10 [V_diff] in order to create 0 [V] on the PZTs, I noticed that the front end was claiming and accumulating overflows *well* before the expected +/- 2^15 = +/- 32768 counts -- somewhere around 27000 [ct] -- only ~80% of the DAC's range. Also, the claimed saturation point appears to be different each time I try to recreate the problem.

Interestingly, though, the voltage monitor for the PZT indicates that -- even though the DAC channels are claiming to be saturated -- there's still real, adjustable voltage coming out of the DAC, all the way up (down) to the negative -10 [V_diff] that it's supposed to be doing.

Maybe there's a bug in the CDS code? 

This is true for all PSAMS channels on the H1OAF0's only 16-bit DAC.