Reports until 19:19, Monday 03 January 2022
H1 CDS (SUS)
filiberto.clara@LIGO.ORG - posted 19:19, Monday 03 January 2022 - last comment - 12:25, Tuesday 04 January 2022(61196)
Troubleshooting of SR3

WP 10144

Issues reported with decaying signal on SR3, alog 61132. The following was done this afternoon to determine if the issue was a failing OSEM or an electronic issue.

LVEA Rack SUS-R4
1. Disconnected cable going to chamber on the UK Satellite Box
2. Using a DB25 breakout we injected 1V DC in series with a 240K resistor
3. By injecting at the UK Satellite Box the whole electronic chain (Sat Box, Coil Driver, AA Chassis, IO ADC card) could be tested
4. Rahul monitored the corresponding voltage in MEDM
5. CH1 (SUS-R3_M1_OSEMINF_RT_IMMON) resulted in 2000 cts
6. CH2-CH4 resulted in 1600 cts
7. Monitored output of SAT box and all channels gave same readings

SAT Box tested ok, moving on to the CER.

CER Rack SUS-C7
1. Powered down the AA chassis
2. All channels dropped to ~20 counts except for the SUS-R3_M1_OSEMINF_RT_IMMON channel
3. Channel SUS-R3_M1_OSEMINF_RT_IMMON gave a reading of 900 cts
4. Disconnected SCSI cable from AA chassis, reading jumped to 3600 cts
5. Disconnected SCSI cable from IO chassis, reading remained 3600 cts

Will no input on the IO chassis, we get an offset of 3600 cts. Tomorrow IO chassis will be power cycled and if issue persists, ADC card will be replaced.

F. Clara, R. Kumar

Comments related to this report
rahul.kumar@LIGO.ORG - 08:56, Tuesday 04 January 2022 (61200)

Attached below are the screenshots of SR3 M1 stage inmons (RT BOSEM), which shows the 900offset (when AA chassis was powered down) and 3000 offset (when disconnected SCSI cable from AA/IO chassis).

Comments from Richard - We have seen the ~4000 count offset before on channels.  I don't recall if it is a blown differential out of the AA or the ribbon into the ADC or the ADC.  But this was definitely an issue when we fired up Aligo.

Images attached to this comment
jeffrey.kissel@LIGO.ORG - 09:40, Tuesday 04 January 2022 (61201)
H1SUSH56 "More Info" screen from H1SUSIOPH56 GDS_TP screen indicates that ADC0 (upon which SR3's M1 RT OSEM is read out) shows that it has failed an autocalibration. 

Attached is a trend of the past month or so's value of the channel that informs the AUTOCAL light, H1:FEC-43_ADC_STAT_0 ("43" because that's H1SUSH56's DCUID, or Front End Computer [FEC] number as per T1400026).

One can clearly see that the value changes and holds steady after the Dec 14th "RCG Upgrade Day."

Images attached to this comment
jeffrey.kissel@LIGO.ORG - 11:11, Tuesday 04 January 2022 (61202)FRS
J. Kissel
(Tagging FRS)

This work corresponds to investigation of SR3's M1 RT OSEM, and is tracked with FRS Ticket 21820.

Since I still struggle with the principles of creating basic circuits sometimes, I always want to understand what to expect from a given test, and we may need to repeat this test in the future, in this comment, I explicitly outline and expand on what Fil did with following test:
    "
        1. Disconnected cable going to chamber on the UK Satellite Box
        2. Using a DB25 breakout we injected 1V DC in series with a 240K resistor
        3. By injecting at the UK Satellite Box the whole electronic chain (Sat Box, Coil Driver, AA Chassis, IO ADC card) could be tested
        4. Rahul monitored the corresponding voltage in MEDM
        5. CH1 (SUS-R3_M1_OSEMINF_RT_IMMON) resulted in 2000 cts
        6. CH2-CH4 resulted in 1600 cts
        7. Monitored output of SAT box and all channels gave same readings
test.
    "

(a) First, recall the top mass OSEM *sensor* PD signal chain from, for example, T1000061, the controls design description for the HAM (Small or Large) Triple Suspensions. One can see the signal chain that Fil describes: The OSEM (in chamber) is connected to a Sat Amp (in the "field" rack, H1-SUS-R4, by the HAM5 chamber), then to the coil driver (in the "remote" rack, H1-SUS-C7 in the CER, where the signal just "passes through"), then to the AA chassis (also in SUS-C7), then into the first ADC card (ADCO) inside the h1sush56 IO chassis. 

(b) In step 1., he's disconnected the "Vacuum Tank" cable, i.e. everything to the (controls design diagram's) left of the satellite amplifier, and in step 2. he's attempting to recreate a OSEM *sensor* PD signal at the "input" [OSEM, or vacuum chamber] side of the sat amp (Sr3 still uses the UK SatAmp chassis, D0900900, so there's no "front" or "back," just "Analogue Rack" and "Vacuum Tank" indicative of to where the other end of the cable is connected).

(c) Now head to the detail of the satellite amplifier to understand what he's connected where and why in step 2. You can find the multipage drawing under D0901284, but I've extracted the relevant details from three pages and attach them here as .pdfs. In addition, I've whiteboarded out the system that Fil created with the "1V DC in series with a 240K resistor" -- a simple current source -- and the (yes, quite simple) math to analyze what to expect. 

The key point is to realize that Fil has connected the positive leg of the 1V DC voltage source to one side of the 240k resistor, and the other side of the resistor to the respective "PD In" pin for a given channel, hence "in series." Not mentioned explicitly is that the negative leg of the voltage source gets connected to the "PD Bias" pin for the same given channel. This creates a constant current source (image borrowed from wikipedia) between the PD In leg and PD Bias leg, mimicking a DC photo-current from a "biased" photodiode, because the (*not* well-indicated on page 2 of the D0901284 drawing) J105 jumper is in the "B" (photovoltaic) mode, so the PD Bias input is directly connected to the + input of the U103B op amp. Thus, the current, I, readout by the op amp (via Ohm's law current) is
    I = V_ref / R_s
where V_ref is the reference, 1V DC, voltage reference, and R_s is the 240e3 [Ohm = V/A] series resistor. As such, Fil's "injecting" a current of 1 [V] / 240e3 [V/A] = 4.16e-6 [A], or 4.2 [mA].

(d) From there, we analyze what to expect at the ADC (the number of counts that "4. Rahul monitored the corresponding voltage in MEDM"), using page 2 and page 3 of D0901284, with the help of the labels on my Whiteboard Drawing:
    I = V_ref / (R_s + R_199)
    V_se = I * R_102
    V_se = V_ref * R_102 / (R_s + R_199)
        (now for the rest, not shown on the whiteboard, but shown on page 3, and then on the controls description)
    V_diff = 2 * V_se
    V_diff = V_ref * 2 * R_102 / (R_s + R_199) [Vpp]
    V_ADC = V_diff
    ct_ADC = V_ADC * 2^16 / 40 [ct/Vpp]
           = V_ref * ( 2 * R_102 / (R_s + R_199) ) * 2^16 / 40 [ct/V]
           = (1 [V]) * ( 2 * 121e3 / (240e3 + 100)) * 2^16/ 40 [ct/V]
    ct_ADC = 1651 [ct]


Thus, as Fil illudes to in "6. CH2-CH4 resulted in 1600 cts," we *expect* that channels to read out ~1600 [ct], and this is why the ~2000 [ct] seen on the CH1, i.e. SR3 M1 RT OSEM ADC channel, was identified as sign that something *up-stream* from the input of the sat amp (toward the ADC away from the vacuum chamber) was in error.

(e) In addition, the line "7. Monitored output of SAT box and all channels gave same readings" means that he had a voltage pickoff of each channel of the sat amp at the rack, likely via a DB15 breakout (with the "To Analogue Rack" cable still connected), reading out a "monitor" of the "V_diff" that is being read out by the ADC -- while still "injecting" the 1V DC as a current source. That "all channels gave the same readings" means that for each channel, this monitor was reporting 
    V_diff = V_ref * 2 * R_102 / (R_s + R_199) [V] ~= 1 [V] 
including CH1, which is SR3's M1 RT OSEM channel.

Quite the clever and effective test! Nice Job Fil!
Images attached to this comment
Non-image files attached to this comment
jeffrey.kissel@LIGO.ORG - 11:35, Tuesday 04 January 2022 (61204)
And in the interest of refreshing everyone's memory and squashing red herrings before they get started, in a comment above (LHO aLOG 61200), Rahul writes down Richard's suspicion of what the problem might be on this morning coordination meeting, 
    "We have seen the ~4000 count offset before on channels.  I don't recall if it is a blown differential out of the AA or the ribbon into the ADC or the ADC.  But this was definitely an issue when we fired up aLIGO."

Richard is referring to the following scenario, originally documented in (the year) 2011's LLO aLOG 1857: 
   - There's a SCSI cable that connects the SCSI ports of a given AA chassis to the SCSI port of the corresponding ADC adapter card on the back of any IO chassis
   - The ADC Adapter Card 's port has very small, male pins that can be easy bent if one's not careful during the connection of the cable.
   - Sometimes, these male pins get bent in such a way that the (rather sharp) pin stabs into the plastic of the connecter, rather than into the conductive socket of the cable. Thus, (typically) one leg, of one differential channel is floating, and this manifests digitally in that it creates an *exact*  -4300 ct (negative 4300 ct) offset that is stable and not noisy. 
   - (as a side note, this issue was insidious: once one bent male pin on the ADC adapter card was bent, and mashed into the SCSI cable, that *SCSI* cable was now molded to the *bent* pin, and plugging it in to *other* adapter cards would bend previously unbent pins, *propagating* the problem.)

Indeed definitely an issue that plagued us in the early days of aLIGO (i.e. circa 2010-2011), and is definitely still possible if one doesn't carefully seat this SCSI connection.

However, that's is *not* what we're seeing here. What we see is a channel that's *really* noisy and its value is drifting all over the place from (a mean of) ~2000 to ~10000 counts depending on who knows what (see plots by Nidhi and Rahul, e.g. from LHO aLOG 61138 or LHO aLOG 61186).
jeffrey.kissel@LIGO.ORG - 12:25, Tuesday 04 January 2022 (61207)CDS, FRS, SUS
This issue has been resolved -- it was indeed an ADC card gone bad. See details of how / why 61205 and (now closed) FRS Ticket 21820.