Displaying report 1-1 of 1.
Reports until 13:02, Tuesday 02 August 2022
H1 SUS (CAL, CDS, CSWG, DetChar, ISC, OpsInfo, SUS)
jeffrey.kissel@LIGO.ORG - posted 13:02, Tuesday 02 August 2022 (64274)
QUAD L2/PUM DACs Upgraded from 18- to 20-bit DACs (as well as ITM L3 ESDs, and 2/3rds of TMSX and TMSY M1 stage, and 2/3rds of BS M1 stage)
D. Barker, F. Clara, J. Kissel, E. von Ries, R. Short
IIET Tickets 13232 and 20828
ECRs E1900216 and E2100485
WP 10600

We have successfully upgraded all of the QUAD's PUM drivers to 20-bit DACs.
Because PUM stages are only 4 channels each, and both 18- and 20-bit DAC cards are 8 channel cards, the *other* 4 channels on each card got upgraded too. As discussed in the planning stages yesterday (see LHO aLOGs 64243 and 64251), that means the collateral upgrades includes 
    - 2/3rds of the top mass OSEM drives for the TMTSs, TMSX and TMSY M1 F1F2F3LF
    - 2/3rds of the top mass OSEM drives for the BS, M1 F1F2F2F3.
    - The bias electrode channel, and single-channel "signal" electrode channel for the ITMX and ITMY ESDs

Every channel that has been upgraded now has a "20BitDAC" filter in FM10 of either the "COILOUTF" or "ESDOUTF" that is a gain of four (4.0) to make up for the calibration difference between an 18-bit DAC (20 / 2^18 [V/ct]) and a 20-bit DAC (20 / 2^20 [V/ct]).
This way, all control systems that surround this change should not notice a difference. (except for the 1% calibrators of the DARM loop.)
In fact, I've moved this same gain of 4, "20BitDAC" filter from FM4 to FM10 in the ETM ESD channels that have been upgraded previously.
These were haphazardly installed "in the middle of" the frequency-dependent driver compensation, (i.e FM4, between the "sim" simulated coil driver response, and the "anti" compensation), but this will cause issues and glitching when we switch in-between states, since the output of the simulated filter would be multiplied by 4 before getting compensated (this is much like the issues we had with putting large amounts of gain in front of, or in between the violin mode damping filters).
In doing so, I had to clear out a few old unused filters, including
    - in ETMY only, the O2-era, untailored, compensation for the ETMY ESD driver response in FM5 and FM10 of the L3 ESDOUTF bank,
    - in ETMY only, a "stop20" elliptic filter in FM10 of the L2 COILOUTF bank, again, a relic of O2 DARM control, and
    - a set of "1:10" "1:30" filters that were in FM9 and FM10 of the TMTS M1 COILOUTF banks.

In addition, because of the re-arrangements and renaming of DAC cards due to quirks of the RCG and how it handles "mixed" chassis of 16-, 18-, and 20-bit DACs I had to modify the effected medm screen macro files such that the right USER MODEL OUTPUT and IOP MODEL OUTPUT displays on the MEDM screens showed the right thing. These live in 
    /opt/rtcds/userapps/release/sus/common/medm/sus${optic}_overview_macro.txt
and, while I checked to see if these filters had any incoming updates from LLO, they did not. Likely, as they correctly realized, the same changes needed after their upgrades to 20-bit DACs would have clobbered our screens, so they didn't even commit them. I'll do the same here, until everything in these IO chassis are upgraded to a 20-bit DAC.

Finally, I noticed that the ITM ESD Bias request was saturating the new 20-bit DACs. So, like the ETM ESDs, and at LLO when they upgraded, when they transitioned from 18- to 20-bit DACs, we can no longer request 9.5 [V_DAC], (see brief mention of this in LHO:46619) so I reduced the ITM ESD bias voltage request from 9.5 [V_DAC] to 9.3 [V_DAC].

Future fallout from this upgrade:
    - We should also be cautious and wary of violin mode damping for a little bit, since all violin mode damping is driven from the PUM stages, and this damping relies on some sort of "dirt coupling;" we just changed the dirt. 
    - The the exact DAC gain of each channel of the may be slightly different that the 18-bit DAC, so we'll probably have to redo PUM coil balancing as well.
    - And, over course, the overall longitudinal actuation strength will like have changed in a more subtle way that "just" a gain of 4, in the eyes of the DARM calibration. So, that'll need to be re-assessed too.

Potential good from this upgrade: we get better DAC noise, for equal drive strength!

I'll post some comments containing screenshots of good configurations of COIL and ESDOUTF in the comments below. 

Erik/Dave may also have further comments reflecting the IOP model changes that were needed and/or how the actual hardware install went.
Displaying report 1-1 of 1.