J. Kissel
IIET Ticket 24632
ECR E2200324
WP 10634

As a result of the front-end digital model and analog cable changes today (see Part I covered in LHO:64620), 
the following actuation stages got upgraded from using an 18-bit DAC to using a 20-bit DAC:
   - H1SUSETMX L1 (UIM) ULLLURLR
   - H1SUSETMY L1 (UIM) ULLLURLR
   - H1SUSBS M2 ULLLURLR
and the following actuation stages got downgraded from using a 20-bit DAC to using an 18-bit DAC:
   - H1SUSTMSX M1 F1F2F3LF (i.e. 2/3rds of the TMSX M1 actuators)
   - H1SUSTMSY M1 F1F2F3LF (i.e. 2/3rds of the TMSY M1 actuators)
   - H1SUSBS M1 F1F2F3LF (i.e. 2/3rds of the BS M1 actuators)

This is Part II of the aLOG series on what needed doing as a result of this ECR, covering the factor of 4x (or 0.25x) change in calibration needed to preserve the overall gain of the actuation system so that the surrounding control system doesn't need to care.

The actions here are pretty simple: 
   (1) remove any of the "20BitDAC" gain(4) filters installed in the FM10s of the COILOUTF banks for the "2/3rds" of the BS, TMSX, and TMSY  M1 stages that inadvertently got upgraded earlier this month when we installed new 20-bit DAC *cards* ih the IO chassis (see LHO:64274).
   (2) Turn OFF the EPICs request to have those filter modules ON
   (3) Accept having those filters OFF in the respective SDF system

   (4) Install new "20BitDAC" gain(4) filters into FM10 of the COILOUTF banks for the BS M2 stage.
   (5) Turn ON the EPICs request to have those filter modules ON
   (6) Accept having those filters ON in the H1 SUS BS SDF.

Attached are the screenshots of the completed actions. The corresponding changes to the model's filter files have been committed the ${userapps}/sus/h1/filterfiles/ directory.