F. Mera, M. Pirello
Continuing with WP11193
7 - Installed segregated +24V run from VDC-C2 U34 RHS to SQZ-C1 for the OMC IO Chassis. This conductively isolates the OMC IO Chassis +24V power from the Beckhoff SQZ +24V power.
8 - Replaced VDC-C2 U24 RHS -18V Kepco which supplies -18V to ISC-C1 & ISC-C2.
H1 VDC Rack Drawing D2300167
This concludes WP11193
Tagging DetChar and CAL, for the improved electrical isolation of the h1omc0 IO chassis (which houses the isolated 524 kHz ADC card that's reading out the OMC DCPDs; the gravitational wave PDs) that comes from Marc / Fernando's execution of: 7 - Installed segregated +24V run from VDC-C2 U34 RHS to SQZ-C1 for the OMC IO Chassis. This conductively isolates the OMC IO Chassis +24V power from the Beckhoff SQZ +24V power. We don't have "smoking gun" evidence "before" the change, but hopefully after this day, the amount or amplitude of lines in the detector sensitivity will be reduced -- so, be aware CW group! Note that this is one of the last official parts of segregating the OMC IO chassis, a la (H1 only, thus far) ECR E2200441 and IIET Ticket 25756. Some of the motivating history is in that FRS ticket, as well as it's predecessor IIET Ticket 17846, where we identified mixing of unsynchronized FPGA clocks on all the ADC and DAC cards in the h1lsc0 chassis -- which cites Roberts initial findings in LHO:58313.