FRS27187

After the replacement of the 2nd ADC on h1seih16 yesterday unfortunately the timing errors persist. The TIM error bit latches on the MEDM, so we don't know the true error rate. Corey cleared the error at 22:30 last night and it reoccured at 22:50.

We believe that this is a very transient error, one error in the 64k reads per second, and only a few errors per day. We also think the error slows the readout of the second ADC and does not prohibit it, meaning that the ISI and HPI models are not impacted by this.

Next steps:

• Reseat adapter card and ribbon cable
• Replace the ADC-Adapter card and ribbon cable, which feed the timing signal to this ADC. We will test a new adapter+ribbon pair on the test stand to ready it for h1seih16 install at the next target-of-opportunity.
• Move all ADC/DAC from the second Adnaco backplane to the third (if the ribbon cables will reach).

In the mean time to get better stats on the current error, I've written a script to DIAG_RESET h1iopseih16 when the ADC1_TIM error is raised.