PI damping guardian has been edited to continue onto PI DAMPING after the first minute of OMC_WHITENING. Edits committed to SVN; diff and commit screenshot attached.
Due to the DCPD glitches from OMC_WHITENING, I had previously not engaged PI_DAMPING to turn on damping gains, coil drivers, etc during this lock stage. Oversight on my part, I didn't think about the case where we stay in that stage to damp violins for >1 hour. Violin damping looked really successful too, until PI24 ran away (nuc31 dcpds screenshot). I guess this shows that we indeed need active PI damping to avoid locklosses due to the 10.4 kHz PIs overlapping with the 2x HOMs.
NUC25 has been updated with a new PI-damping ndscope, which shows the PI damping's drive to the ESDs. Screenshot is annotated.
In the scope, first 2 plots show the ETMY (10.4kHz, PI 24+31) and ETMX (80.3kHz, PI 28+29) PI mode monitors. 3rd plot shows ESD drives: for ETMY, should be ~1000, for ETMY, should be ~50,000. If ESD drive is 0, there is no PI damping.
To damp manually, can do the following for e.g. PI 24 damping:
- caput H1:SUS-ETMY_PI_ESD_DRIVER_PI_DAMP_SWITCH 1 # turn on coil drive for PI damping. IF 80kHz PI 28 or 29 ring up, change "ETMY" to "ETMX".
- caput H1:SUS-PI_PROC_COMPUTE_MODE24_DAMP_GAIN 1000 # turn on damping gain for PI24 aka "MODE24". Change "MODE24" to whatever is ringing up.
- caput H1:SUS-PI_PROC_COMPUTE_MODE24_PLL_FREQ_FILT2_RSET 2 # reset PLL integrator. Change "MODE24" to whatever is ringing up.
If PI Guardian is in "PI_DAMPING", but you want to manually step the phase, take it to "IDLE".
This is what PI_DAMPING guardian does (ie, turns on ESD switch, turns on damping gain, resets PLL integrator, then steps phase around until rms decreases).
Looks like this guardan edit is working, and we can now do PI DAMPING in OMC_WHITENING, screenshot attached.
