J. Kissel

Betsy asked me to put together a prioritized list of 18-bit DACs that could be upgraded to 20-bit DACs during the upcoming Jan / Feb 2024 commissioning break in order to close out IIET:13232 and IIET:20828. We don't think we'll have time to do *all* the DAC upgrades during the break, and thus we again find ourselves asking the priority DACs / IO chassis to hit first.

I note that in IIET:13232, the last comment *attempted* to create this list what remaining "pum" stages needed upgrade based on what was *not* mentioned in LHO:66836, but the story is incomplete because IIET:20828 says that "we just need to upgrade them all."

So, here's the prioritized list of the 31x 20-bitDAC cards remaining to upgrade, granulated into 3x to 5x card swaps.
	(a) [2x] Close out [1] and upgrade PRM M2/M3, and PR2 M2/M3. 
		DAC5 (Slot 8, card_num = 5) on h1sush2a for PRM
		DAC4 (Slot 7, card_num = 4) on h1sush34 for PR2
	(b) [2x] Upgrade PR3/SR3 M2/M3 DACs
		DAC6 (Slot 9, card_num = 6) on h1sush2a for PR3
		DAC3 (Slot 6, card_num = 3) on h1sush56 for SR3
	(c) [1x] Upgrade ITMX and ITMY UIM DACs
		DAC4 (Slot 8, card_num = 4) on h1susb123
	(d) [3x] Finish out susex IO chassis upgrades (which is ETMX M0 / R0 and TMSX M1)
		DAC0, DAC1, DAC2 on h1susex
	(e) [3x] Finish out susey IO chassis upgrades (which is ETMY M0 / R0 and TMSY M1)
		DAC0, DAC1, DAC2 on h1susey
	(f) [5x] Finish out susb123 IO chassis upgrade (which is ITMX M0/R0, ITMY M0/R0, and BS M1)
		DAC0, DAC1, DAC4, DAC5, DAC9 on h1susb123
	(g) [3x] MC2 M2/M3, MC1 M2/M3, MC3 M2/M3
		DAC3 (Slot 7, card_num = 3) on h1sush34 for MC2
		DAC3 (Slot 6, card_num = 3) on h1sush2a for MC1
		DAC4 (Slot 7, card_num = 4) on h1sush2a for MC3
	(i) [3x] MC1/MC3/PRM/PR3 top masses
		DAC0 (Slot 2, card_num = 1) in h1sush2a for MC1/MC3 M1
		DAC1 (Slot 4, card_num = 1) in h1sush2a for MC3/PRM M1
		DAC2 (Slot 5, card_num = 2) in h1sush2a for PRM/PR3 M1
	(j) [3x] MC2/PR2/SR2 top masses
		DAC0 (Slot 2, card_num = 0) in h1sush34 for MC2/PR2 M1 
		DAC1 (Slot 4, card_num = 1) in h1sush34 for PR2/SR2 M1
		DAC2 (Slot 5, card_num = 2) in h1sush34 for SR2 M1
	(k) [4x] SRM/SR3/OMC top masses
		DAC0, DAC1, DAC2, DAC3 in h1sush56
	(l) [2x] IMs
		DAC0, DAC1 in h1sush2b

Of course, you can group the lower priority stuff in larger chunks, if you like and/or if you don't want to drag out the upgrade across many days.

Or if it's easier to replace an entire IO chassis DAC cards, rather than think about / risk the mistake of replacing the wrong card, you can do that too (this is what LLO did in the end).

If you want to do it by IO chassis, here's a prioritized list for that instead:
	(b) h1sush2a (to get the PRM, PR3 M2/M3's up to 20-bit DACs, you'll get all the less important MC1 / MC3 M2/M3 stages and top-masses with this "for free")
	(c) h1sush34 (to get PR2's M2/M3 up to 20-bit DACs, you'll get all of MC2 and the rest of SR2 upgrades "for free")
	(d) h1sush56 (to get SR3's M2/M3 up to 20-bit DACs, you'll get the top-masses of SRM and SR3 "for free")
	(a) h1susb123 (to get the ITM UIMs up to 20-bit DACs, you'll get the ITMX, ITMY, BS top masses "for free")
	(e) h1susetmx (to finally get all the end-station top masses done)
	(f) h1susetmy (to finally get all the end-station top masses done)
	(g) h1sush2b (to get the IMs)

Note that there's a few discrepant documents out there quotes a total count of 
    - "29x," (Keith's Mar 2023 inventory, E2300281) 
    - "30x," (Fil's re-inventory in Sep 2023, as a part of the A+ O5 review E2300309) 
    - and here I quote 31x cards.
I would guess that this discrepancy results from folks missing a DAC or two here or there; could be, for example, that the IMs were overlooked.
If we don't have the cards for the IMs, that would be the first set of 2x 20-bit DACs that I would suggest we convert to 1x 16-bit DACs (and change the AI chasis, accordingly).