Displaying report 1-1 of 1.
Reports until 13:04, Tuesday 09 July 2024
LHO VE
david.barker@LIGO.ORG - posted 13:04, Tuesday 09 July 2024 - last comment - 11:43, Thursday 11 July 2024(78967)
CDS Maintenance Summary: Tuesday 9th July 2024

WP11970 h1susex 28AO32 DAC

Fil, Marc, Erik:

Fil connected the upper set of 16 DAC channels to the first 16 ADC channels and verified there were no bad channels in this block. At this point there were two bad channels; chan4 (5th chan) and chan11 (12th chan).

Later Marc and Erik powered the system down and replaced the interface card, its main ribbon cable back to the DAC and the first header plate including its ribbon to the interface card. What was not replaced was the DAC card itself and the top two header plates (Fil had shown the upper 16 channels had no issues). At this point there were no bad channels, showing the problem was most probably in the interface card.

No DAQ restart was required.

WP11969 h1iopomc0 addition of matrix and filters

Jeff, Erik, Dave:

We installed a new h1iopomc0 model on h1omc0. This added a mux matrix and filters to the model, which in turn added slow channels to the DAQ INI file. DAQ restart was required.

WP11972 HEPI HAM3

Jim, Dave:

A new h1hpiham3 model was installed. The new model wired up some ADC channels. No DAQ restart was required.

DAQ Restart

Erik, Jeff, Dave:

The DAQ was restarted soon after the new h1iopomc0 model was installed. We held off the DAQ restart until the new filters were populated to verify the IOP did not run out of processing time, which it didn't. It went from 9uS to 12uS.

The DAQ restart had several issues:

both GDS needed a second restart for channel configuration

FW1 spontaneously restarted itself after running for 9.5 minutes.

WP11965 DTS login machine OS upgrade

Erik:

Erik upgraded x1dtslogin. When it was back in operation the DTS environment channels were restored to CDS by restarting dts_tunnel.service and dts_env.service on cdsioc0.

Comments related to this report
david.barker@LIGO.ORG - 13:29, Tuesday 09 July 2024 (78970)

Tue09Jul2024
LOC TIME HOSTNAME     MODEL/REBOOT
09:50:32 h1omc0       h1iopomc0   <<< Jeff's new IOP model
09:50:46 h1omc0       h1omc       
09:51:00 h1omc0       h1omcpi     


09:52:18 h1seih23     h1hpiham3   <<< Jim's new HEPI model


10:10:55 h1daqdc0     [DAQ] <<< 0-leg restart for h1iopomc0 model
10:11:08 h1daqfw0     [DAQ]
10:11:09 h1daqnds0    [DAQ]
10:11:09 h1daqtw0     [DAQ]
10:11:17 h1daqgds0    [DAQ]
10:11:48 h1daqgds0    [DAQ] <<< 2nd restart needed


10:14:02 h1daqdc1     [DAQ] <<< 1-leg restart
10:14:15 h1daqfw1     [DAQ]
10:14:15 h1daqtw1     [DAQ]
10:14:16 h1daqnds1    [DAQ]
10:14:24 h1daqgds1    [DAQ]
10:14:57 h1daqgds1    [DAQ] <<< 2n restart needed


10:23:07 h1daqfw1     [DAQ] <<< FW1 spontaneous restart


11:54:35 h1susex      h1iopsusex  <<< 28AO32 DAC work in IO Chassis
11:54:48 h1susex      h1susetmx   
11:55:01 h1susex      h1sustmsx   
11:55:14 h1susex      h1susetmxpi 
 

marc.pirello@LIGO.ORG - 13:51, Tuesday 09 July 2024 (78973)

Power Spectrum of channels 0 through 15.  No common mode issues detected. 

Channel 3 & 9 are elevated below 10Hz

It is unclear if these are due to the PEM ADC or the output of the DAC.  More testing is needed.

 

Images attached to this comment
marc.pirello@LIGO.ORG - 10:06, Wednesday 10 July 2024 (79000)

New plot of first 16 channels, with offsets added to center the output to zero.  When offsets were turned on, the 6Hz lines went away, I believe these were due to uninitialized DAC channels.  This plot also contains the empty upper 16 channels on the PEM ADC chassis as a noise comparison with nothing attached to the ADC.  Channel 3 is still noisy below 10Hz.

Images attached to this comment
marc.pirello@LIGO.ORG - 11:43, Thursday 11 July 2024 (79030)

New plot of second 16 channels (ports C & D), with offsets added to center the output to zero.  This plot also contains the empty lower 16 channels on the PEM ADC chassis as a noise comparison with nothing attached to the ADC.  Channel 3 is still noisy below 10Hz, signifying this to be an ADC issue, not necissarily a DAC issue.  These plots seem to imply that the DAC noise desnity while driving zero volts is well below the ADC noise floor in this frequency range.

Images attached to this comment
Displaying report 1-1 of 1.