"Yes, and..."
- It makes sense to zero the ALIGNMENT offsets for RM1, RM2, and PM1. They're physically aligning the optics in chamber this week, so we don't want to get confused by having digital offsets driven out to the coils.

- Daniel says "Changed the signs of the coil outputs for RM1 and RM2. This should account for the sign change of the OSEM voltages."
Here, "the change in sign of the OSEM voltages" means the fixing of the "has been like that forever as far as we can tell" issue that the RM1 and RM2 OSEM PD sensor readback's ADC voltage had been negative when under light. The fix was in the in-air DB25 feedthru to satamp cable; see LHO:84027 and subsequent comment about the differences in satellite amplifiers.

He acknowledges that this fix will disrupt the overall sign of the damping loops, so he just *picked* a place to flip the sign. 
He chose the COILOUTF banks, but
    . we use these banks to explicitly compensate for the magnet polarity, and 
    . RM1 and RM2 have already confirmed to be different in this regard in Mar 2018; see LHO:40853 -- and in that aLOG we concluded it was RM2 that was abnormal because RM2 required a different damping loop gain than RM1, OM1, OM2, and OM3 when all *settings* were otherwise the same.
    . HOWEVER given that the OSEM sensor readback itself had a negative in it, I'm no longer convinced it's RM2 that's the problem. But at least we know they're different.
    . I tried to have Betsy/Rahul go in chamber to confirm magnet polarity but these HTTS magnets are particularly hard to get at / measure, given that they're buried within the flag and the PEEK flag can no longer be unscrewed from the aluminum optic holder; see LHO:84178
So, since we're left stuck not understanding the coil actuator magnet polarity, I *don't* want to fix the *sensor* sign here. 
We've reverted the above change of COILOUTF signs. They're now restored to 

 $ caget H1:SUS-RM1_M1_COILOUTF_UL_GAIN H1:SUS-RM1_M1_COILOUTF_LL_GAIN H1:SUS-RM1_M1_COILOUTF_UR_GAIN H1:SUS-RM1_M1_COILOUTF_LR_GAIN
H1:SUS-RM1_M1_COILOUTF_UL_GAIN 1
H1:SUS-RM1_M1_COILOUTF_LL_GAIN -1
H1:SUS-RM1_M1_COILOUTF_UR_GAIN -1
H1:SUS-RM1_M1_COILOUTF_LR_GAIN 1

$ caget H1:SUS-RM2_M1_COILOUTF_UL_GAIN H1:SUS-RM2_M1_COILOUTF_LL_GAIN H1:SUS-RM2_M1_COILOUTF_UR_GAIN H1:SUS-RM2_M1_COILOUTF_LR_GAIN
H1:SUS-RM2_M1_COILOUTF_UL_GAIN -1
H1:SUS-RM2_M1_COILOUTF_LL_GAIN 1
H1:SUS-RM2_M1_COILOUTF_UR_GAIN 1
H1:SUS-RM2_M1_COILOUTF_LR_GAIN -1

- He's confirming our work on PM1 from LHO:83293

- 2025-04-29, Daniel has made the model changes in h1sushtts, but they've not yet been installed as this is a trivial top-level model change that has been there forever, and is blocked from reaching the DAC by just turning of the SUS-RM*_ISCINF_L bank inputs.

- We'll re-address the damping loop signs once the dust settles with chamber work.