J. Kissel

During today's upgrade of susb123's DACs (LHO:84519), and as Ryan and I were adding calibration change compensation in various OUTF banks (LHO:84509) I realized that we've never accounted for the gain loss when upgrading the PI DACs from 18-bit DACs to 20-bit DACs.

That "gain loss" more explicitly:
    - Assume you tune the open loop gain of the PI damping loop to be some magnitude |G|, with a 18-bit DAC, which has gain calibration of 20V/2^18 = 7.6294e-5 [V/ct].
    - Then you upgrade the DAC to a 20-bit DAC, which has gain calibration 20/2^20 = 1.9073e-5 [V/ct], a factor of 0.25x, or a factor of 4.0x less [V/ct].
    - This drops the loop gain |G| by the same factor of 4x, if not accounted for digitally.
Note, this is a scale factor at all frequencies. So, even if the DAC output is high-passed at 10 kHz, the gain above 10 kHz is still lower. 
I say this because they are high-passed at 10 kHz in both the ETM and ITM low-noise ESD drivers; see D1400301 block diagrams and circuit drawings D1500016 and D1600122 for ETM and ITM.

In every other SUS DAC chain, we compensate for this with a "20bitDAC" filter which is a "gain(4)" filter so that any upstream loop that uses that DAC chain doesn't have to be re-designed upon the transition from 18- to 20-bit DAC.

Here's the history of when each PI DAC was upgrade, including all the different names / numbers of how they're referred:
    IO Chassis    Card Name    "The nth DAC"   Slot    When Upgraded       aLOG 
    h1susex         DAC4           5th          7        Oct 2018          LHO:44918
    h1susey         DAC4           5th          7        Jun 2020          LHO:56217
    h1susb123       DAC6           7th          9        May 2025          LHO:84508

However, the PI models and MEDM interfaces aren't built with convenient places to apply a DAC gain calibration fix. An inconvenient but logical location to account for this would in each and every MODE's UPCONV_UC[n]_SIG bank, and I see no evidence of such a gain filter. If you wanted to be sneaky, you increase the OUT_MTRX coefficient from +/-1.0 to +/-4.0, but that has also not been done. I don't see any other evidence an additional gain of 4x along any mode's digital chain. 

I do note that we developed "EXTREME_PI_DAMPING" Dec 2024 LHO:81909 in hopes to get more oomph out of the ETMY PI system.
I wonder if we can get more oomph by just increasing the loop gain by a factor of 4x ...

I'm using this aLOG to mildly advocate for an ECR to implement some ESDOUTF filter banks just upstream of the DAC outputs, like we do for the audio-band DAC requests on the rest of the suspensions.