J. Kissel, O. Patane
ECRs: E2400409 and E2500296
IIET: 35739 and 35706, respectively
WP: 12901
DWG: D1002741

Oli was working their way through adjusting the SUS "OUTF" FM10 blocks that are traditionally used to adjust the calibration of the DACs being used, and we re-realized that we've never had a place in the PI model to adjust the DAC gain thru the upgrades from 18- to 20-, and now 28-bit DACs -- see the original discovery back in May 2025 (LHO:84522, which quotes that ETMY's PI DAC had been misalibrated by a factor of 4x since Jun 2020).

In that May 2025 aLOG, I "mildly advocated" for an implementation of ESDOUTF banks like there is in every other SUS drive chain. 
Today, I implemented that change, since (a) the gain difference between a 18-bit and 28-bit DAC is now a factor of 2^10 = 1024x -- much more noticeable, and (b) it's a total no brainer change that's easy to do while we're already restarting this model for the DAC upgrade proper.

The update to the library, 
    /opt/rtcds/userapps/release/sus/common/models
        PI_MASTER_V2.mdl          r26600 --> r34033
is within the ETM_UPCONV_V2 block, which I show in the attached BEFORE vs AFTER.

We have compiled, installed, and restarted h1susetmypi front-end model so that it has this minor change.
Oli will aLOG the installation of the gains.