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Reports until 16:41, Tuesday 10 February 2026
H1 CDS
david.barker@LIGO.ORG - posted 16:41, Tuesday 10 February 2026 - last comment - 16:46, Tuesday 10 February 2026(89108)
CDS Maintenance Summary: Tuesday 10th February 2026

WP13018 Upgrade h1oaf0 18bit-DAC to 20bit-DAC

Fil, Oli, Anamaria, Robert, Ryan S, EJ, Dave:

We replaced the first DAC in h1oaf0 (a 18bit-DAC) with a 20bit-DAC. We reused the IO Chassis ribbon cable and Interface card, they are identical for these types of DAC.

This DAC is only being used by the PEM model.

A new h1iopoaf0 model was installed with the DAC change, its INI file was not changed.

A new h1pemcs model was installed with several changes:

 . All 8 DAC channels are now being driven (previously last channel was not driven)

 . An excitation stage was added to the model, a copy from LLO's PEM models. This comprises two Oscillators and a Noise_generator (see medm below)

 . An additional DACOUTF filter bank as added just prior to the DAC part, each with a x4 filter in the FM10 slot.

A DAQ restart was required.

18bit-DAC (removed) 101208-66
20bit-DAC (installed, originally in h1susb123) 210303-49

Attached image shows H1PEM_CS_DAC_DRIVES_CUST.adl MEDM which maps the excitation path from OSC/NOISE_GEN through the filters for each DAC channel. Note on DACOUTF, each FM10 has a 20BitDAC filter, which is a x4 gain.

As an example, image shows chan0 being driven by a 0.1Hz sine wave with amp=1.0. The image is caught when the input is 0.988, but the DAC_chan0 drive is 3.953.

Recovery of PSL camera images.

Fil, Corey, Dave:

Following the replacement of camera power supplies, I recovered the PSL cameras and quad video server images.

DAQ Restart

Dave:

The DAQ was restarted for the h1pemcs model change. There were no problems with this restart.

 

 

Images attached to this report
Comments related to this report
david.barker@LIGO.ORG - 16:46, Tuesday 10 February 2026 (89109)

Tue10Feb2026
LOC TIME HOSTNAME     MODEL/REBOOT
11:28:08 h1oaf0       ***REBOOT*** <<< Power cycle of h10af0 to upgrade to 20bit-DAC


11:29:51 h1oaf0       h1iopoaf0   <<< new iop model
11:30:04 h1oaf0       h1pemcs     <<< new pem model
11:30:17 h1oaf0       h1tcscs     
11:30:30 h1oaf0       h1susprocpi 
11:30:43 h1oaf0       h1seiproc   
11:30:56 h1oaf0       h1oaf       
11:31:09 h1oaf0       h1calcs     
11:31:22 h1oaf0       h1susproc   
11:31:35 h1oaf0       h1calinj    
11:31:48 h1oaf0       h1bos       


11:38:10 h1daqdc1     [DAQ] <<< 1-leg restart
11:38:22 h1daqfw1     [DAQ]
11:38:23 h1daqtw1     [DAQ]
11:38:24 h1daqnds1    [DAQ]
11:38:31 h1daqgds1    [DAQ]
11:44:32 h1daqgds0    [DAQ] <<< 0-leg restart
11:44:39 h1daqfw0     [DAQ]
11:44:39 h1daqtw0     [DAQ]
11:44:40 h1daqnds0    [DAQ]
 

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