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Reports until 13:53, Friday 06 March 2026
H1 CDS
david.barker@LIGO.ORG - posted 13:53, Friday 06 March 2026 (89404)
h1sush6 front end build

WP13043 h1sush6 front end install

Daniel, Erik, Fil, Jonathan, Dave:

The new h1sush6 front end system is running with its full card complement and a basic IOP model.

On Wednesday afternoon we got the computer booting and seeing most of its chassis, detailed in alog 89376

The outstanding issues were: timing card was not receiving a timing signal, 4th Adnaco BP was not seen.

On Thursday we tracked the fibre issues to a not-quite-seated MTP on the MSR's MER patch (port 3). Once this fibre was reseated correctly the timing card received its signal and the 4th Adnaco BP was seen.

At this point I built up the IO Chassis with the correct card layout, using the ADC and 16bit-DACs provided by the BHD group. We supplied the Interface cards and ribbon cables from stock.

As of end-of-business Thursday the IO Chassis was almost complete, I had miscounted the 16bit-DACs and we were one card short. I built h1iopsush6 with this partial layout and we got the model running.

Friday lunch time I installed the 5th 16bit-DAC and added it to h1iopsush6. The system is now complete as-per drawings G2301306

H1SUSH6 IO Chassis Layout

A1-1 LIGO Timing Card S2101110   A3-1 16AO16-DAC4 250611-24 S2500772 --- S1500324
A1-2 empty   A3-2 empty
A1-3 16AI64-ADC0 S2500754 --- S1102353   A3-3 empty
A1-4 16AO16-DAC0 110419-25 --- S1900099   A3-4 empty
         
A2-1 16AI62-ADC1 210128-39 S2500747 --- S1102355   A4-1 6464Contec-BIO0
A2-2 16AO16-DAC1 250611-03 S2500773 --- S1102283   A4-2 empty
A2-3 16AO16-DAC2 250911-07 S2500768 --- S1900098   A4-3 empty
A2-4 16AO16-DAC3 25-611-10 S2500770 --- S15000314   A4-4 empty

 

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